Staff Physical Design Engineer-DPG-LPDDR

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 15+ yearsEducation: mastersSkills: ["Technical leadership","Problem-solving","Stakeholder management","Mentoring"]

Lead end-to-end RTL-to-GDSII physical design for complex SoCs on advanced technology nodes, driving floorplanning, power planning, CTS, place & route, and timing closure through physical signoff. Own PPA optimization, low-power implementation, congestion management, and design convergence. Execute physical verification and reliability closure (STA, SI, EM/IR, DRC/LVS) for tape-out readiness while defining methodologies and automation strategies and leveraging AI for productivity improvements.

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FursaFursa
Micron Technology
Micron Technology
2 weeks ago

Staff Physical Design Engineer-DPG-LPDDR

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Job Summary

Lead end-to-end RTL-to-GDSII physical design for complex SoCs on advanced technology nodes, driving floorplanning, power planning, CTS, place & route, and timing closure through physical signoff. Own PPA optimization, low-power implementation, congestion management, and design convergence. Execute physical verification and reliability closure (STA, SI, EM/IR, DRC/LVS) for tape-out readiness while defining methodologies and automation strategies and leveraging AI for productivity improvements.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Lead end-to-end RTL-to-GDSII implementation for complex SoCs across advanced technology nodes.
  • •Drive floorplanning, power planning, CTS, place & route, timing closure, and physical signoff.
  • •Own PPA optimization, low-power implementation, congestion management, and design convergence.
  • •Lead STA, SI, EM/IR, DRC, LVS, and reliability closure to achieve tape-out readiness.
  • •Define physical design methodologies, automation strategies, and flow improvements, and mentor engineers across global teams.

Key Requirements

  • •B. Tech/M. Tech in Electrical Engineering, VLSI, or related field.
  • •15+ years of hands-on Physical Design experience with multiple successful SoC tape outs.
  • •Strong expertise in floorplanning, CTS, place & route, STA, low-power design, physical verification, and signoff.
  • •Hands-on experience with ICC2/Fusion Compiler, Innovus, PrimeTime, Calibre, and EM/IR analysis tools.
  • •Proficiency in Tcl, Python, Perl, or Shell scripting and strong technical leadership/problem-solving.
Experience:15+ yearsSoCASICRTL-to-GDSIIMemory SoCAI/ML
Education:Master's in Electrical Engineering, VLSI
Skills:Technical leadershipProblem-solvingStakeholder managementMentoring
Tech Stack:RTL-to-GDSIIICC2Fusion CompilerInnovusPrimeTimeCalibreEM/IRDRCLVSSTASITclPythonPerlShellFloorplanningCTSPlace & RouteLow-Power DesignPower Planning

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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