Hardware - AI Chip Architect

FuriosaAI
Seoul
Full timeFunction: Hardware, Embedded & Systems EngineeringExperience: 2+ yearsEducation: mastersSkills: []

Own AI chip module architecture and microarchitecture specs, then implement designs in RTL and iterate for optimal power, timing, and area. Converge functionality with PPA, create lightweight test benches, and debug complex simulation issues. Work across chip design tasks spanning RTL implementation, logic synthesis/verification, timing closure, and deeper modeling of performance, power, and area for AI compute at scale.

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FursaFursa
FuriosaAI
FuriosaAI
1 week ago

Hardware - AI Chip Architect

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 12 minutes agoStatus: Live

Job Summary

Own AI chip module architecture and microarchitecture specs, then implement designs in RTL and iterate for optimal power, timing, and area. Converge functionality with PPA, create lightweight test benches, and debug complex simulation issues. Work across chip design tasks spanning RTL implementation, logic synthesis/verification, timing closure, and deeper modeling of performance, power, and area for AI compute at scale.
Location: Seoul
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Define architecture and microarchitecture specifications.
  • •Take ownership of one or more chip modules and implement them in RTL.
  • •Converge functionality and PPA of the design.
  • •Implement designs in RTL (System Verilog or other HDLs) and iterate for optimal power, timing, and area.
  • •Create simple test benches and debug complex logic simulations.

Key Requirements

  • •Master's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
  • •2+ years of chip design experience specializing in RTL design, logic synthesis, verification, and timing closure.
  • •Experience implementing microprocessor simulators in depth using C++ or other high-level languages.
  • •Experience modeling PPA (performance, power, area) of designs.
  • •Experience with scripting languages to automate simulation and analysis.
Experience:2+ yearsChip designRTL designLogic synthesisVerification
Education:Master's in Electrical Engineering or Computer Science
Languages:English
Tech Stack:RTLSystem VerilogHDLsC++Logic synthesisVerificationTiming closurePPA modelingScripting languagesTest benchesChiselRISC-V

Company Brief

FuriosaAI
Designs and develops data‑center AI inference accelerators (RNGD) and a full stack hardware‑software platform to deliver energy‑efficient, high‑performance AI compute for enterprise and cloud customers.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Scaleup
Valuation: USD 500M to 1B
Funding: Series C
Headquarters: Seoul, South Korea
Founded: 2017
Glassdoor
Glassdoor: 4.6
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