Lead SMU Validation Engineer - Data Center GPU

AMD
Markham
Workplace: HybridFull timeFunction: Administration & Executive AssistanceSkills: ["Technical leadership","Issue triage","Root-cause analysis","Cross-functional collaboration","Mentoring"]

Drive SMU (System Management Unit) hardware and power-management validation for AMD Data Center GPU products, covering pre-silicon through bring-up, post-silicon enablement, and system-level debug. Own validation strategy and execution, develop plans for SMU sub-blocks and power-management features, and lead debug triage with root-cause analysis across hardware, firmware, and platform interactions. Partner cross-functionally and build automation, validation content, and debug-analysis scripts to improve coverage and repeatability.

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FursaFursa
AMD
AMD
20 hours ago

Lead SMU Validation Engineer - Data Center GPU

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Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live

Job Summary

Drive SMU (System Management Unit) hardware and power-management validation for AMD Data Center GPU products, covering pre-silicon through bring-up, post-silicon enablement, and system-level debug. Own validation strategy and execution, develop plans for SMU sub-blocks and power-management features, and lead debug triage with root-cause analysis across hardware, firmware, and platform interactions. Partner cross-functionally and build automation, validation content, and debug-analysis scripts to improve coverage and repeatability.
Location: Markham
Workplace: Hybrid
Employment Type: Full time
Job Function: Administration & Executive Assistance

Key Responsibilities

  • •Own SMU hardware validation planning and execution across emulation, ASIC bring-up, post-silicon enablement, regression, and sustaining phases.
  • •Develop validation plans for SMU sub-blocks and power-management features (e.g., bootcode, clocking, fuse, SMN/SMUIO, thermal, RSMU, security-related interactions).
  • •Lead debug triage, root-cause analysis, and issue closure across hardware, firmware, platform, diagnostics, and system-level interactions.
  • •Partner with architecture, design, firmware, diagnostics, platform, automation, customer engineering, and program teams to align scope, risks, dependencies, and exit criteria.
  • •Build and improve automation, validation content, debug-analysis scripts, and regression checks; review RTL/specifications/register maps to find coverage gaps.

Key Requirements

  • •Strong experience in SoC power-management validation, SMU hardware features, and firmware interactions
  • •Experience independently driving validation planning, issue triage, root-cause analysis, and issue closure
  • •Proficiency with SMU/PMFW functionality, subsystem communication, and system-level debug
  • •Experience developing validation plans, test content, automation, and debug methodologies for complex SoC or GPU products
  • •Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field preferred
Experience:Semiconductor validationSilicon bring-upSoC validationFirmware validationAI/HPCGPU products
Education:
Skills:Technical leadershipIssue triageRoot-cause analysisCross-functional collaborationMentoring
Languages:En-us
Tech Stack:PythonC/C++LinuxRTLRegister-level debugFirmware logsAutomationRegression checks

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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