Intern-Product Validation

Cadence Design Systems
Shanghai
Workplace: OnsiteFull timeFunction: Communications, PR & CommunityEducation: mastersSkills: ["Communication","Self-motivation","Confidence"]

Support hierarchical solution development and validation by assisting with Cadence’s hierarchical solution area test planning and execution. Create and maintain comprehensive hierarchical solution unit and flow test cases for the Innovus Digital Implementation System. Develop test suites for new hierarchical functional/flow solutions, applying strong digital IC design and (optionally) statistical timing analysis knowledge. Collaborate in an English/Chinese team with a self-driven, motivated approach for 6+ months.

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Cadence Design Systems
Cadence Design Systems
16 hours ago

Intern-Product Validation

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 16 hours agoStatus: Live
Reposted: similar role first listed 7 months ago

Job Summary

Support hierarchical solution development and validation by assisting with Cadence’s hierarchical solution area test planning and execution. Create and maintain comprehensive hierarchical solution unit and flow test cases for the Innovus Digital Implementation System. Develop test suites for new hierarchical functional/flow solutions, applying strong digital IC design and (optionally) statistical timing analysis knowledge. Collaborate in an English/Chinese team with a self-driven, motivated approach for 6+ months.
Location: Shanghai
Workplace: Onsite
Employment Type: Full time
Job Function: Communications, PR & Community
Seniority: Intern level

Key Responsibilities

  • •Assist in Cadence hierarchical solution area development and validation.
  • •Validate and maintain hierarchical solution unit and flow test cases for the Innovus Digital Implementation System.
  • •Develop test suites for new hierarchical functional/flow solution features.
  • •Help ensure comprehensive coverage of hierarchical solution test scenarios as new features are introduced.

Pay and Benefits

Schedule:4-Day Week

Key Requirements

  • •MS in microelectronics, EE, or related majors.
  • •Digital IC design knowledge.
  • •Statistical timing analysis knowledge is a strong plus.
  • •Unix system knowledge; experience with vi/TCL/TK/CSH/Perl is a plus.
  • •Good communication in English and Chinese, with confidence and self-motivation; prefer working 3-4 days per week for 6+ months.
Education:Master's in microelectronics, EE
Skills:CommunicationSelf-motivationConfidence
Languages:EnglishChinese
Tech Stack:Innovus Digital Implementation SystemHierarchical solutionHierarchical solution test casesHierarchical functional/flow solutionsUnixViTCLTKCSHPerlStatistical timing analysisDigital IC design

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
Glassdoor
Glassdoor: 3.9
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