Chassis IP Senior Design Engineer

Intel
Bengaluru
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Experience: 7+ yearsEducation: bachelorsSkills: ["Communication","Collaboration"]

Design and develop logic for component and foundation IP used in Intel SoC chassis, focusing on interconnect IP architecture and microarchitecture. You will build RTL coding, simulations, and verification workflows for high-performance data/control plane routers, switches, arbiters, protocol conversion bridges, and debug/trace components. Optimize PPA (power, performance, area) and timing, perform quality checks, and support SoC customers with IP integration and verification.

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FursaFursa
Intel
Intel
3 days ago

Chassis IP Senior Design Engineer

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Last checked: 18 hours agoStatus: Live

Job Summary

Design and develop logic for component and foundation IP used in Intel SoC chassis, focusing on interconnect IP architecture and microarchitecture. You will build RTL coding, simulations, and verification workflows for high-performance data/control plane routers, switches, arbiters, protocol conversion bridges, and debug/trace components. Optimize PPA (power, performance, area) and timing, perform quality checks, and support SoC customers with IP integration and verification.
Location: Bengaluru
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Develop logic designs, RTL coding, and simulations for functional units, IP blocks, and subsystems.
  • •Define and implement architecture and microarchitecture features for interconnect IP, including routers, switches, arbiters, protocol conversion bridges, debug/trace components, and clock/power controls.
  • •Perform quality checks and optimize RTL designs to improve IP power, performance, area, and timing.
  • •Evaluate design trade-offs across area, bandwidth, timing, and reliability to achieve balanced and efficient functionality.
  • •Support sub-system/SoC customers with IP integration and verification workflows.

Key Requirements

  • •7+ years of experience in logic design and RTL development, with a Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
  • •Proficiency in hardware description languages including Verilog and SystemVerilog.
  • •Strong digital design knowledge including timing analysis, power optimization, and area trade-offs.
  • •Experience using industry-standard EDA tools (e.g., Synopsys, Cadence, Mentor Graphics) for quality checks and simulation.
  • •Familiarity with AMBA (CHI/AXI/AHB/APB) and PCIe/CXL protocols is a plus.
Experience:7+ yearsSoC integration
Education:Bachelor's in Electrical Engineering, Computer Engineering, or a related field
Skills:CommunicationCollaboration
Tech Stack:VerilogSystem VerilogRTLSynopsysCadenceMentor GraphicsAMBACHIAXIAHBAPBPCIeCXLEDATiming analysisPower optimizationArea trade-offsQoSSecurityRAS

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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