Integrated Circuit - Packaging Architect Engineer

AMD
Austin
Workplace: HybridFull timeUSD 142,450 - 244,200 annuallyFunction: Hardware, Embedded & Systems EngineeringEducation: phdSkills: ["Leadership","Cross-functional collaboration","Oral and written communication","Technology problem-solving","Executive communication"]

Drive advanced semiconductor packaging architecture across client, server, gaming, and GPU products. Collaborate with product design teams and technology partners to define a packaging roadmap spanning architecture, process definition, DFM/DFY guidelines, and technology qualification. Lead cross-functional, multi-geo efforts to develop novel package architectures and processes, establish yield roadmaps, and address yield, reliability, and process development challenges using data tools.

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FursaFursa
AMD
AMD
1 week ago

Integrated Circuit - Packaging Architect Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 8 hours agoStatus: Live
Reposted: similar role first listed 1 month ago

Job Summary

Drive advanced semiconductor packaging architecture across client, server, gaming, and GPU products. Collaborate with product design teams and technology partners to define a packaging roadmap spanning architecture, process definition, DFM/DFY guidelines, and technology qualification. Lead cross-functional, multi-geo efforts to develop novel package architectures and processes, establish yield roadmaps, and address yield, reliability, and process development challenges using data tools.
Location: Austin
Workplace: Hybrid
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

  • •Collaborate with product architects to define package architectures and a technology roadmap.
  • •Lead new packaging technology initiatives from concept through full qualification.
  • •Drive test vehicle design and manufacturing to establish design rules and DFM/DFY guidelines.
  • •Establish a yield roadmap and implement yield improvements using data analytics tools as needed.
  • •Communicate technology development progress at an executive level and solve technical yield, reliability, and process development challenges.

Pay and Benefits

Salary: USD 142,450 - 244,200 annually

Key Requirements

  • •Proven track record driving technology development in the semiconductor field.
  • •Experience leading engineering teams in architecture definition, process definition, and/or yield improvement.
  • •In-depth knowledge in material science, thin film process development, and/or packaging.
  • •Experience working with manufacturing partners such as suppliers, OSATs, and foundry partners.
  • •Proven track record driving yield improvement and defect reduction in semiconductor fab or packaging environments.
Experience:SemiconductorSemiconductor packagingMaterial scienceManufacturing partners
Education:PhD / Doctorate in Material Science, Mechanical Engineering, Computer Science, Applied Mathematics, Electrical Engineering
Skills:LeadershipCross-functional collaborationOral and written communicationTechnology problem-solvingExecutive communication
Tech Stack:DFMDFYYield roadmapData analytics tools

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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