Sr. Principal Product Engineer

Cadence Design Systems
San Jose
Full timeUSD 161,000 - 299,000 annuallyFunction: Communications, PR & CommunityExperience: 10+ yearsEducation: bachelorsSkills: ["Written communication","Verbal communication","Presentation skills","Mentoring","Technical leadership","Problem-solving"]

Serve as a technical leader on the Voltus product engineering team, translating the toughest IR/EM, PDN, and electrothermal signoff requirements from strategic foundries and customers into deployable product and flow solutions. Partner with R&D and multiple Cadence groups to drive advanced-node IR/EM enablement, resolve complex customer modeling/signoff issues, validate modeling assumptions, and shape the product roadmap through insights from account programs.

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Cadence Design Systems
Cadence Design Systems
1 hour ago

Sr. Principal Product Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 1 hour agoStatus: Live
Reposted: similar role first listed 5 months ago

Job Summary

Serve as a technical leader on the Voltus product engineering team, translating the toughest IR/EM, PDN, and electrothermal signoff requirements from strategic foundries and customers into deployable product and flow solutions. Partner with R&D and multiple Cadence groups to drive advanced-node IR/EM enablement, resolve complex customer modeling/signoff issues, validate modeling assumptions, and shape the product roadmap through insights from account programs.
Location: San Jose
Employment Type: Full time
Job Function: Communications, PR & Community
Seniority: Sr. Manager level

Key Responsibilities

  • •Act as the primary technical interface to R&D for Voltus, setting product requirements, priorities, and methodology for strategic foundry and customer programs.
  • •Lead Voltus enablement for advanced-node IR/EM signoff, including flow/techfile/PDK readiness, reference flows, qualification, benchmarking, and production deployment.
  • •Resolve complex customer issues across IR/EM, low-power/multi-voltage domains, hierarchical and full-chip signoff, and related timing/stack-die interactions.
  • •Define and validate foundry-aligned power integrity and EM modeling assumptions, partnering with PDK, extraction, and signoff teams for advanced-node and 3DIC readiness.
  • •Mentor Lead/Principal PEs and AEs; set debug standards, deployment practices, and issue-tracking discipline; present findings and recommendations to customer and internal leadership.

Pay and Benefits

Salary: USD 161,000 - 299,000 annually
Equity and Bonus:Equity
Perks:Paid LeavePaid Holidays401kHealth InsuranceDentalVisionEquityAnnual Bonus

Key Requirements

  • •Bachelor’s in Electrical/Electronics/VLSI Engineering with 10+ years, or MS with 8+ years, or PhD with 6+ years.
  • •Deep hands-on experience with industry-standard IR/EM (EMIR) and PDN analysis tools and digital physical implementation/signoff flows.
  • •Strong background in CMOS/digital design, power IR-drop analysis, circuit analysis, and low-power/multi-power-domain chip power-integrity signoff.
  • •Proven ability to debug large SoC/PDN problems, separate critical issues from noise, and close the loop from customer requirement to R&D fix and deployment.
  • •Scripting in Tcl and Python, with strong written/verbal/presentation skills for customer and executive audiences.
Experience:10+ years
Education:Bachelor's in Electrical / Electronics / VLSI Engineering
Skills:Written communicationVerbal communicationPresentation skillsMentoringTechnical leadershipProblem-solving
Tech Stack:VoltusIR/EMEMIRPDNElectrothermalStatic IRDynamic IRTclPythonIntegrityTempusInnovusQuantusQRC3DICPDKFlow/techfile/PDK readinessElectrothermal co-analysis3DIC / chiplet

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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