Samsung

2 days ago

Senior Staff Engineer, Physical Design (Floorplanning)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 19 hours agoStatus: Live

Job Summary

Shape physical implementation and methodology for high-performance GPU and system-level IP, focusing on top-level floorplanning and power-grid design. Own key stages of the physical design flow—including placement, routing, timing closure, and signoff—while driving PPA optimization for advanced-node programs. Collaborate across architecture, RTL, advanced design technology, and system-level teams; mentor junior engineers and improve automation, tool optimization, and scalable execution across parallel development cycles.

Location: Austin

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Drive full-chip and block-level physical design implementation, including top-level floorplanning, placement, routing, timing closure, and signoff for complex GPU and SoC designs.
•Develop implementation strategies to achieve power, performance, and area (PPA) targets, including power-grid design, power optimization, congestion management, and reliability considerations.
•Advance physical design methodology and flow innovation through automation, tool optimization, and scalable design practices, including developing or rewriting physical design flows.
•Collaborate cross-functionally with architecture, RTL, advanced design technology, software, system-level teams, and external vendors to resolve complex implementation challenges and align design assumptions.
•Mentor junior engineers and promote continuous learning, ownership, accountability, and innovation to stay ahead of emerging GPU physical design technologies.

Pay and Benefits

Salary: USD 180,200 - 270,400 annually

Perks:Health InsuranceDentalVisionLife Insurance401kMeal AllowanceTuition AssistancePaid LeaveStudent LoanWellness Stipend

Key Requirements

•11+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 9+ years with a Master’s Degree, or 7+ years with a Ph.D.
•7+ years of hands-on experience with full physical design implementation flows, including synthesis, place-and-route, clock tree synthesis (CTS), timing closure, and signoff.
•Strong expertise in top-level floorplanning for complex GPU or SoC designs, including low-power design and physical verification (DRC/LVS).
•Hands-on power-grid design and implementation experience using PNR tools (FusionCompiler, Innovus or equivalent).
•Proficiency in power-grid robustness analysis (RedHawk or equivalent) and experience with timing analysis and convergence methodologies (STA, signal integrity, reliability).

Experience:7+ yearsSemiconductorsGPUSoCAdvanced-node

Education:

Skills:AnalyticalDebuggingProblem-solvingCollaborationMentoring

Tech Stack:PythonTclShellPerlFusionCompilerInnovusSynopsysCadenceICC2PrimeTimeTempusStarRCRedHawkSTAClock tree synthesisPlace-and-routeEDAPNR

Company Brief

Samsung

Global conglomerate known for consumer electronics, home appliances, semiconductors, displays, and mobile devices. Designs and manufactures a wide range of products and solutions for consumers, enterprises, and industrial customers worldwide.

Industry: Conglomerates & Holding Companies

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Seoul, South Korea

Founded: 1938

Glassdoor: 3.7

Website LinkedIn

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Samsung

2 days ago

Senior Staff Engineer, Physical Design (Floorplanning)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 19 hours agoStatus: Live

Job Summary

Location: Austin

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Drive full-chip and block-level physical design implementation, including top-level floorplanning, placement, routing, timing closure, and signoff for complex GPU and SoC designs.
•Develop implementation strategies to achieve power, performance, and area (PPA) targets, including power-grid design, power optimization, congestion management, and reliability considerations.
•Advance physical design methodology and flow innovation through automation, tool optimization, and scalable design practices, including developing or rewriting physical design flows.
•Collaborate cross-functionally with architecture, RTL, advanced design technology, software, system-level teams, and external vendors to resolve complex implementation challenges and align design assumptions.
•Mentor junior engineers and promote continuous learning, ownership, accountability, and innovation to stay ahead of emerging GPU physical design technologies.

Pay and Benefits

Salary: USD 180,200 - 270,400 annually

Perks:Health InsuranceDentalVisionLife Insurance401kMeal AllowanceTuition AssistancePaid LeaveStudent LoanWellness Stipend

Key Requirements

•11+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 9+ years with a Master’s Degree, or 7+ years with a Ph.D.
•7+ years of hands-on experience with full physical design implementation flows, including synthesis, place-and-route, clock tree synthesis (CTS), timing closure, and signoff.
•Strong expertise in top-level floorplanning for complex GPU or SoC designs, including low-power design and physical verification (DRC/LVS).
•Hands-on power-grid design and implementation experience using PNR tools (FusionCompiler, Innovus or equivalent).
•Proficiency in power-grid robustness analysis (RedHawk or equivalent) and experience with timing analysis and convergence methodologies (STA, signal integrity, reliability).

Experience:7+ yearsSemiconductorsGPUSoCAdvanced-node

Education:

Skills:AnalyticalDebuggingProblem-solvingCollaborationMentoring

Tech Stack:PythonTclShellPerlFusionCompilerInnovusSynopsysCadenceICC2PrimeTimeTempusStarRCRedHawkSTAClock tree synthesisPlace-and-routeEDAPNR

Company Brief

Samsung

Industry: Conglomerates & Holding Companies

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Seoul, South Korea

Founded: 1938

Glassdoor: 3.7

Website LinkedIn