Layout Engineer

Texas Instruments
Bengaluru
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringEducation: bachelorsSkills: ["Teamwork","Communication","Problem-solving","Documentation","Time management"]

Own the end-to-end IC layout process: plan layout schedules, effort estimates, risk mitigation, and final layout sign-off. Collaborate with designers, packaging, and process teams to update PDKs/design rules, develop custom lead-frames, and analyze EM, thermal gradients, ESD/LU performance, and layout parasitics. Debug and verify using LVS/DRC/ERC/antenna flows, develop test vehicles for new technologies, and mentor junior layout engineers.

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FursaFursa
Texas Instruments
Texas Instruments
2 days ago

Layout Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 11 hours agoStatus: Live

Job Summary

Own the end-to-end IC layout process: plan layout schedules, effort estimates, risk mitigation, and final layout sign-off. Collaborate with designers, packaging, and process teams to update PDKs/design rules, develop custom lead-frames, and analyze EM, thermal gradients, ESD/LU performance, and layout parasitics. Debug and verify using LVS/DRC/ERC/antenna flows, develop test vehicles for new technologies, and mentor junior layout engineers.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

  • •Frame layout schedules, effort estimates, and risk/mitigation plans for layout activities across project layout engineers.
  • •Partner with designers to understand IC architecture and key requirements and balance area, performance, and schedule during layout development.
  • •Coordinate with process development on PDK, P-cell, and design rule updates; collaborate with packaging engineers on custom lead-frame development.
  • •Analyze and close Electro Migration, Thermal gradients, ESD/LU performance, and layout parasitics; routinely develop test vehicles for new process and package technologies.
  • •Ensure final layout meets design expectations and layout checklist; mentor and guide junior/contract layout engineers and drive continuous process/quality/cycle-time improvements.

Key Requirements

  • •Full chip/layout experience from definition through release to production.
  • •Strong LVS, DRC, ERC, and antenna debug skills.
  • •Proficiency in analog and mixed-signal layout and verification, including device matching, power bus design, cross-talk avoidance, and ESD/LU protection techniques.
  • •Knowledge of layout parasitics and device physics plus semiconductor fabrication process fundamentals.
  • •Hands-on experience with nodes/technologies such as 40nm/65nm/90nm/130nm/180nm, BiCMOS, or BCD.
Education:Bachelor's
Skills:TeamworkCommunicationProblem-solvingDocumentationTime management
Tech Stack:Virtuoso XLAssuraPVSVoltasSKILL

Company Brief

Texas Instruments
Designs and manufactures semiconductors and analog chips used in industrial, automotive, personal electronics, communications, and enterprise systems. It is one of the world’s largest semiconductor companies, with a broad portfolio of embedded processing and power products.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Dallas, United States
Founded: 1930
WebsiteLinkedIn