Senior DFT Design Engineer (ATPG/Scan stitching)

AMD
Hyderabad
Workplace: OnsiteFull timeINR 3,338,160 - 4,768,800 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsSkills: ["Teamwork","Communication","Analytical thinking","Problem-solving","Willingness to learn"]

Design and validate DFT functionality to improve the quality of industry-leading semiconductor technologies. Implement and verify scan features including SCAN, MBIST, LBIST, and JTAG; generate and validate ATPG patterns with gate-level simulation; and analyze test coverage and test cost reduction. Provide debug support using Spyglass-DFTDRC, perform scan insertion and correlation, and deliver post-silicon bring-up support to enhance yield learning.

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FursaFursa
AMD
AMD
1 month ago

Senior DFT Design Engineer (ATPG/Scan stitching)

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 20 hours agoStatus: Live

Job Summary

Design and validate DFT functionality to improve the quality of industry-leading semiconductor technologies. Implement and verify scan features including SCAN, MBIST, LBIST, and JTAG; generate and validate ATPG patterns with gate-level simulation; and analyze test coverage and test cost reduction. Provide debug support using Spyglass-DFTDRC, perform scan insertion and correlation, and deliver post-silicon bring-up support to enhance yield learning.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Implement and verify DFT features including SCAN, MBIST, LBIST, and JTAG.
  • •Support Spyglass-DFTDRC debug and perform coverage correlation.
  • •Perform scan insertion and generate ATPG patterns.
  • •Verify ATPG patterns using gate-level simulation.
  • •Provide post-silicon support for bring-up success and yield learning enhancement.

Pay and Benefits

Salary: INR 3,338,160 - 4,768,800 annually

Key Requirements

  • •Bachelors degree with 7+ years or Masters degree with 5+ years in Electronics engineering/Electrical Engineering.
  • •Experience implementing and verifying DFT features including SCAN, MBIST, LBIST, and JTAG.
  • •Hands-on experience with scan-stitching and related scan-stitching concepts.
  • •Excellent hands-on ATPG skills, including knowledge of files required to run ATPG and ATPG verification with gate-level simulation.
  • •Strong debug and scripting skills; exposure to Spyglass-DFT and/or Tessent ATPG (mentor) is preferred.
Experience:5+ yearsSemiconductorDFTATPGScan-stitching
Education:
Skills:TeamworkCommunicationAnalytical thinkingProblem-solvingWillingness to learn
Languages:English
Tech Stack:DFTSCANMBISTLBISTJTAGSpyglass-DFTDRCATPGGate-level simulationTessentTCLAWKSED

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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