Senior DFT Design Engineer (ATPG/Scan stitching)
AMD
Hyderabad
Workplace: OnsiteFull timeINR 3,338,160 - 4,768,800 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsSkills: ["Teamwork","Communication","Analytical thinking","Problem-solving","Willingness to learn"]Design and validate DFT functionality to improve the quality of industry-leading semiconductor technologies. Implement and verify scan features including SCAN, MBIST, LBIST, and JTAG; generate and validate ATPG patterns with gate-level simulation; and analyze test coverage and test cost reduction. Provide debug support using Spyglass-DFTDRC, perform scan insertion and correlation, and deliver post-silicon bring-up support to enhance yield learning.

