ASIC Design and Verification Intern, SOC - 2027

NVIDIA
Shanghai
Workplace: OnsiteInternshipFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Analytical thinking","Debugging","Attention to detail","Willingness to learn","Communication"]

Work on ASIC reset/fuse/sysctrl/boot and clock-related logic for NVIDIA products within the SysASIC and Clock teams. Develop and debug Verilog/SystemVerilog RTL, testbenches, assertions, and simulation regressions, and help diagnose issues across simulation, formal verification, lint, CDC/RDC, synthesis, STA, and gate-level verification. Collaborate with cross-functional teams and build automation/AI-assisted tools to improve design and verification flows.

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FursaFursa
NVIDIA
NVIDIA
1 week ago

ASIC Design and Verification Intern, SOC - 2027

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Last checked: 19 minutes agoStatus: Live

Job Summary

Work on ASIC reset/fuse/sysctrl/boot and clock-related logic for NVIDIA products within the SysASIC and Clock teams. Develop and debug Verilog/SystemVerilog RTL, testbenches, assertions, and simulation regressions, and help diagnose issues across simulation, formal verification, lint, CDC/RDC, synthesis, STA, and gate-level verification. Collaborate with cross-functional teams and build automation/AI-assisted tools to improve design and verification flows.
Location: Shanghai
Workplace: Onsite
Employment Type: Internship
Job Function: Design (Product/UX/UI/Visual)
Seniority: Intern level

Key Responsibilities

  • •Participate in RTL design and verification of SysASIC and clock-related IPs.
  • •Develop and debug Verilog/SystemVerilog RTL, testbenches, assertions, and simulation regressions.
  • •Analyze and resolve issues from simulation, formal verification, lint, CDC/RDC, synthesis, STA, and gate-level verification.
  • •Collaborate with cross-functional teams to improve design quality, verification coverage, and development efficiency.
  • •Develop scripts, automation tools, and an AI agent to improve design and verification flows.

Key Requirements

  • •Pursuing a BS/MS degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • •Understanding of digital logic design and front-end ASIC development flow, including RTL design, simulation, synthesis, STA, lint, and CDC/RDC.
  • •Familiarity with clocking concepts such as clock gating, clock-domain crossing, reset synchronization, PLLs, and timing fundamentals.
  • •Proficiency in Verilog and/or SystemVerilog; knowledge of UVM, SVA, or functional coverage is a plus.
  • •Understanding of formal verification concepts and tools, including property specification, SVA, equivalence checking, or formal property verification.
Education:Bachelor's in Electrical Engineering, Computer Engineering, Computer Science, or a related field
Skills:Analytical thinkingDebuggingAttention to detailWillingness to learnCommunication
Languages:English
Tech Stack:ASICRTLVerilogSystemVerilogUVMSVAFunctional coverageFormal verificationPythonPerlTclShell scriptingCC++LinuxEDA toolsCDC/RDCSTAGate-level verificationSimulation regressions

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
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Glassdoor: 4.3
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