AI Silicon, Digital Design Engineer

Unconventional AI
Palo Alto
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsEducation: bachelorsSkills: ["Leadership","Mentorship","Communication","Team collaboration","Problem-solving"]

Join a small, multi-disciplinary R&D team as a Member of Technical Staff to drive invention, prototyping, and validation of core digital design components for a novel AI-focused SoC. Lead micro-architecture, integrate third-party IP, mentor junior engineers, and push RTL implementation, synthesis, timing, and DV across a cutting-edge energy-efficient compute platform.

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FursaFursa
Unconventional AI
Unconventional AI
2 months ago

AI Silicon, Digital Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 8 hours agoStatus: Live

Job Summary

Join a small, multi-disciplinary R&D team as a Member of Technical Staff to drive invention, prototyping, and validation of core digital design components for a novel AI-focused SoC. Lead micro-architecture, integrate third-party IP, mentor junior engineers, and push RTL implementation, synthesis, timing, and DV across a cutting-edge energy-efficient compute platform.
Location: Palo Alto
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Lead the detailed micro-architecture definition and top-level integration of digital blocks (CPU, memory subsystems, interfaces) for the SoC.
  • •Oversee integration of third-party IP into the main SoC fabric.
  • •Provide technical leadership and mentoring to junior digital design engineers; establish design best practices and QA processes.
  • •Drive hands-on RTL implementation and ensure power, performance, and area targets are met; implement and debug key digital interfaces.
  • •Perform synthesis, timing analysis, and basic verification (LEC, CDC/RDC checks) to ensure routability and correct timing.

Pay and Benefits

Perks:Health Insurance401kPaid LeaveMeal Allowance

Key Requirements

  • •BS or MS in Electrical Engineering, Computer Engineering, or related field; 8+ years in digital ASIC/SoC design
  • •Expertise in Verilog RTL coding and digital design fundamentals
  • •Familiarity with EDA tools for simulation, synthesis, linting, and CDC analysis
  • •Understanding of full ASIC design flow from specification to tape-out
  • •Excellent written and verbal communication; ability to lead junior engineers and establish design practices
Experience:8+ yearsSemiconductorsASICSoCDigital design
Education:Bachelor's
Skills:LeadershipMentorshipCommunicationTeam collaborationProblem-solving
Languages:English
Tech Stack:VerilogRTLEDA toolsSimulationSynthesisLintingCDCRDCTimingLECCAD/EDATiming closure

Company Brief

Unconventional AI
Builds customizable AI copilots and fine-tuned large language model solutions to help teams automate workflows, surface actionable insights, and integrate generative AI into business processes across products and operations.
Industry: AI & Machine Learning
Company Size: Small (11 to 50 employees)
Growth: Early Stage Startup
Funding: Seed
Website