Ciena

1 month ago

Mixed Signal Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 7 hours agoStatus: Live

Job Summary

Design high-precision Sigma-Delta DACs/ADCs and SystemVerilog models for high-speed SerDes IP, collaborating with system, analog, digital, DSP, SI, hardware, firmware and lab teams to enable advanced CMOS/BiCMOS RF/mixed-signal circuits used in fiber-optic modems.

Location: Ottawa

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Design the high precision Sigma-Delta DAC and ADC for control and monitoring
•Design the SystemVerilog models for various analog macros
•Design the IBIS-AMS models for the high-speed DAC and ADC based SerDes IP running at 56Gbd, 112Gbd, 224Gbd, and 448Gbd
•Create Design Specification Document
•Interact with and provide support to the system team, analog team, the digital team, the DSP team, the signal integrity team, the hardware team, firmware team, and the analog lab bring-up team.

Pay and Benefits

Salary: CAD 90,600 - 144,800 annually

Perks:MedicalDentalVision401kEsppEapPaid Leave

Key Requirements

•Electrical or computer engineering, computer science or other applicable scientific degree at the BEng/BSc, MEng/MSc, or PhD level
•Design experience in the latest CMOS and BiCMOS technology
•Proficiency with Cadence Virtuoso/Xcelium/AMS, Synopsys VCS/StarRC, Siemens Questa/Formal/Calibre/SymphonyAMS/AFS
•Familiarity with SystemVerilog, VerilogAMS, VerilogA, Matlab/Simulink, C/C++, Python languages
•Ability to work independently and collaboratively with team members

Experience:TelecommunicationsSemiconductorsHigh-speedCMOSBiCMOS

Education:Bachelor's

Skills:CommunicationTeamworkProblem-solving

Tech Stack:Cadence VirtuosoXceliumAMSSynopsys VCSStarRCQuestaCalibreSymphonyAMSVerilogSystemVerilogVerilogAVerilogAMSMatlabSimulinkCC++PythonIBIS-AMSSerDesDAC

Company Brief

Ciena

Provides networking systems, software, and services that enable service providers, cloud operators, and enterprises to deliver high-capacity connectivity and adaptive network solutions worldwide.

Industry: Networking Equipment

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Hanover, United States

Founded: 1992

Glassdoor: 3.8

Website LinkedIn

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Ciena

1 month ago

Mixed Signal Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 7 hours agoStatus: Live

Job Summary

Location: Ottawa

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Design the high precision Sigma-Delta DAC and ADC for control and monitoring
•Design the SystemVerilog models for various analog macros
•Design the IBIS-AMS models for the high-speed DAC and ADC based SerDes IP running at 56Gbd, 112Gbd, 224Gbd, and 448Gbd
•Create Design Specification Document
•Interact with and provide support to the system team, analog team, the digital team, the DSP team, the signal integrity team, the hardware team, firmware team, and the analog lab bring-up team.

Pay and Benefits

Salary: CAD 90,600 - 144,800 annually

Perks:MedicalDentalVision401kEsppEapPaid Leave

Key Requirements

•Electrical or computer engineering, computer science or other applicable scientific degree at the BEng/BSc, MEng/MSc, or PhD level
•Design experience in the latest CMOS and BiCMOS technology
•Proficiency with Cadence Virtuoso/Xcelium/AMS, Synopsys VCS/StarRC, Siemens Questa/Formal/Calibre/SymphonyAMS/AFS
•Familiarity with SystemVerilog, VerilogAMS, VerilogA, Matlab/Simulink, C/C++, Python languages
•Ability to work independently and collaboratively with team members

Experience:TelecommunicationsSemiconductorsHigh-speedCMOSBiCMOS

Education:Bachelor's

Skills:CommunicationTeamworkProblem-solving

Tech Stack:Cadence VirtuosoXceliumAMSSynopsys VCSStarRCQuestaCalibreSymphonyAMSVerilogSystemVerilogVerilogAVerilogAMSMatlabSimulinkCC++PythonIBIS-AMSSerDesDAC

Company Brief

Ciena

Provides networking systems, software, and services that enable service providers, cloud operators, and enterprises to deliver high-capacity connectivity and adaptive network solutions worldwide.

Industry: Networking Equipment

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Hanover, United States

Founded: 1992

Glassdoor: 3.8

Website LinkedIn