Senior Physical Design Layout Engineer
Tel Aviv
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Linux","TCL","Python","Shell scripting","ERC","LVS","DRC","Synopsys","Cadence"]Join NVIDIA’s Networking Silicon team as a Senior Physical Design Verification Layout Engineer. You’ll lead floorplanning, pin placement, and physical verification (ERC/LVS/DRC) across multiple chip projects, implementing and optimizing layout for high-speed silicon. Collaborate in a team-focused, engineering-driven environment to deliver cutting-edge chips with low latency and high throughput.
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