2 months ago

Senior Performance Modeling Architect, CPU Fabric and LLC

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 11 hours agoStatus: Live

Job Summary

Lead architectural definition and improvement of CPU cache hierarchies and interconnects, building cycle-accurate performance models to optimize L3/system caches and coherent fabrics. Bridge automotive and data-center domains, model bottlenecks across scales, evaluate coherency protocols, run industry benchmarks, and collaborate with silicon, software, and verification teams to drive performance.

Location: Santa Clara

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Key Responsibilities

•Developing and maintaining high-fidelity, cycle-accurate performance models (C++/SystemC) for coherent interconnects and large-scale shared caches.
•Modeling and analyzing performance bottlenecks across varying scales from automotive SoCs to multi-mesh data center architectures.
•Evaluating the performance impact of different coherency protocols and snooping filters.
•Running and analyzing industry-standard benchmarks (SPEC, MLPerf, automotive suites) to drive architectural trade-offs.
•Collaborating with build/verification teams to correlate performance models with silicon and optimize drivers for the hardware topology.

Pay and Benefits

Salary: USD 152,000 - 287,500 annually

Equity and Bonus:Equity

Key Requirements

•A Master’s or Ph.D. in Computer Engineering, Electrical Engineering, or Computer Science with a focus on architecture and 5+ years of experience.
•Strong understanding of CPU microarchitecture, memory consistency models, and cache coherency protocols.
•Proven experience in C++ or SystemC for cycle-accurate or functional modeling.
•Proficiency in Python for processing large datasets, generating performance visualizations, and automating simulation sweeps.
•Understanding of Network-on-Chip topologies (Mesh, Ring, Torus), credit-based flow control, and arbitration logic.

Experience:5+ yearsComputer architectureNoCCache coherencyHigh-performance computingData center

Skills:C++SystemCPythonSPECMLPerfNoCCache coherency

Tech Stack:C++SystemCPythonSPECMLPerfNoCMeshRingTorus

Company Brief

NVIDIA

Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor

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NVIDIA

2 months ago

Senior Performance Modeling Architect, CPU Fabric and LLC

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 11 hours agoStatus: Live

Job Summary

Location: Santa Clara

Workplace: Onsite

Employment Type: Full time

Job Function: Solutions Engineering & Sales Engineering

Key Responsibilities

•Developing and maintaining high-fidelity, cycle-accurate performance models (C++/SystemC) for coherent interconnects and large-scale shared caches.
•Modeling and analyzing performance bottlenecks across varying scales from automotive SoCs to multi-mesh data center architectures.
•Evaluating the performance impact of different coherency protocols and snooping filters.
•Running and analyzing industry-standard benchmarks (SPEC, MLPerf, automotive suites) to drive architectural trade-offs.
•Collaborating with build/verification teams to correlate performance models with silicon and optimize drivers for the hardware topology.

Pay and Benefits

Salary: USD 152,000 - 287,500 annually

Equity and Bonus:Equity

Key Requirements

•A Master’s or Ph.D. in Computer Engineering, Electrical Engineering, or Computer Science with a focus on architecture and 5+ years of experience.
•Strong understanding of CPU microarchitecture, memory consistency models, and cache coherency protocols.
•Proven experience in C++ or SystemC for cycle-accurate or functional modeling.
•Proficiency in Python for processing large datasets, generating performance visualizations, and automating simulation sweeps.
•Understanding of Network-on-Chip topologies (Mesh, Ring, Torus), credit-based flow control, and arbitration logic.

Experience:5+ yearsComputer architectureNoCCache coherencyHigh-performance computingData center

Skills:C++SystemCPythonSPECMLPerfNoCCache coherency

Tech Stack:C++SystemCPythonSPECMLPerfNoCMeshRingTorus

Company Brief

NVIDIA

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1993

Glassdoor: 4.3

Website LinkedIn Glassdoor