Staff Design Engineer, HBM Architecture

Micron Technology
United States
Workplace: OnsiteFull timeUSD 146,000 - 297,000 annuallyFunction: Architecture & Urban PlanningExperience: 5+ yearsEducation: bachelorsSkills: ["Collaboration","Technical mentoring","Problem solving","Documentation"]

Architect and design high-speed HBM read/write datapath circuitry for next-generation High Bandwidth Memory products, from concept through silicon bring-up and production. Collaborate across design, PHY, ECC, verification, layout, and system teams to deliver logic-die and core-die datapath micro-architectures. Optimize bandwidth, power, area, and timing, integrate reliability features, and implement schematic/RTL datapath logic with robust clocking, gating, and reset strategies.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
Micron Technology
Micron Technology
2 weeks ago

Staff Design Engineer, HBM Architecture

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 18 hours agoStatus: Live

Job Summary

Architect and design high-speed HBM read/write datapath circuitry for next-generation High Bandwidth Memory products, from concept through silicon bring-up and production. Collaborate across design, PHY, ECC, verification, layout, and system teams to deliver logic-die and core-die datapath micro-architectures. Optimize bandwidth, power, area, and timing, integrate reliability features, and implement schematic/RTL datapath logic with robust clocking, gating, and reset strategies.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Architecture & Urban Planning
Seniority: Mid level

Key Responsibilities

  • •Architect and design HBM read and write datapath across core and logic die, including alignment, buffering, timing, and control logic.
  • •Develop high-speed, low-latency datapath circuits for multi-channel HBM architectures and wide internal buses.
  • •Optimize datapath designs for bandwidth, power, area, and timing closure at advanced technology nodes.
  • •Integrate data reliability features such as parity, ECC hooks, lane redundancy, and remapping mechanisms.
  • •Implement schematic-level and RTL-level datapath designs (clocking, gating, and reset strategies) and partner with PHY, DFT, verification, and layout teams for functionality, testability, and manufacturability.

Pay and Benefits

Salary: USD 146,000 - 297,000 annually
Perks:Health InsuranceDentalVisionPaid LeavePaid HolidaysParental Leave

Key Requirements

  • •Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field with 7+ years of relevant industry experience, or a Master’s degree with 5+ years.
  • •3+ years of experience in high-speed digital datapath design (memory, SerDes, or SoC datapath).
  • •3+ years of hands-on experience with digital schematic build, RTL, or mixed-signal datapath implementations.
  • •Experience translating specifications into robust micro-architectures and collaborating across cross-functional teams.
  • •Familiarity with advanced process-node challenges affecting signal integrity, skew control, and power optimization.
Experience:5+ yearsHBMDRAMHigh-speed datapathSerDesSoCMixed-signal
Education:Bachelor's in Electrical Engineering, Computer Engineering, or a related field
Skills:CollaborationTechnical mentoringProblem solvingDocumentation
Tech Stack:HBMDRAMJEDECRTLStatic timing analysisMicrosoft Copilot

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
Glassdoor
Glassdoor: 3.7
WebsiteLinkedIn