Intel

3 months ago

System Modelling Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 19 hours agoStatus: Live

Job Summary

Analog and mixed-signal IP architect role focused on end-to-end PHY system modeling for 224Gbps SerDes IP. Lead architecture, modeling, and performance analysis to enable robust silicon for next-gen SoCs/ASICs; collaborate cross-functionally on channel, TX/RX, jitter/noise, and compliance with industry standards.

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Key Responsibilities

•Develop end-to-end behavioral models for 224Gbps SerDes PHYs across TX, channel, and RX; build statistical and time-domain models to evaluate BER and eye margins.
•Define PHY performance budgets (jitter, noise, ISI, crosstalk, insertion loss) and model/optimize PAM4 signaling at very high data rates.
•Model electrical channels including packages, PCBs, connectors, and crosstalk; develop and tune TX FIR, RX CTLE, DFE, and adaptive equalization algorithms.
•Model PLL/DLL behavior, phase noise, jitter transfer functions; perform jitter decomposition and bathtub analysis; analyze CDR performance and loop dynamics.
•Support industry standards interpretation (IEEE, OIF) and define test methodologies; translate system models to blocklevel specs and assist silicon bring-up in collaboration with design teams.

Key Requirements

•Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 12+ years of experience; or a Master’s degree with 8+ years; or PhD with 4+ years.
•Proficiency in analog circuit design, including TX/RX blocks and system-level understanding.
•Expertise in architecture modeling and high-speed design techniques.
•Ability to model, simulate, and optimize performance, power, and area for analog and mixed-signal IPs.
•Strong leadership and collaboration skills with experience influencing cross-functional roadmaps; effective communication to articulate architectural features and tradeoffs.

Experience:12+ yearsSemiconductorSoCASICIP

Education:Bachelor's

Skills:LeadershipCommunicationCollaborationProblem-solving

Tech Stack:PAM4SerDesTXRXDFECTLEFIRPLLDLLBEREye diagrams

Company Brief

Intel

Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor

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Intel

3 months ago

System Modelling Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 19 hours agoStatus: Live

Job Summary

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Key Responsibilities

•Develop end-to-end behavioral models for 224Gbps SerDes PHYs across TX, channel, and RX; build statistical and time-domain models to evaluate BER and eye margins.
•Define PHY performance budgets (jitter, noise, ISI, crosstalk, insertion loss) and model/optimize PAM4 signaling at very high data rates.
•Model electrical channels including packages, PCBs, connectors, and crosstalk; develop and tune TX FIR, RX CTLE, DFE, and adaptive equalization algorithms.
•Model PLL/DLL behavior, phase noise, jitter transfer functions; perform jitter decomposition and bathtub analysis; analyze CDR performance and loop dynamics.
•Support industry standards interpretation (IEEE, OIF) and define test methodologies; translate system models to blocklevel specs and assist silicon bring-up in collaboration with design teams.

Key Requirements

•Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 12+ years of experience; or a Master’s degree with 8+ years; or PhD with 4+ years.
•Proficiency in analog circuit design, including TX/RX blocks and system-level understanding.
•Expertise in architecture modeling and high-speed design techniques.
•Ability to model, simulate, and optimize performance, power, and area for analog and mixed-signal IPs.
•Strong leadership and collaboration skills with experience influencing cross-functional roadmaps; effective communication to articulate architectural features and tradeoffs.

Experience:12+ yearsSemiconductorSoCASICIP

Education:Bachelor's

Skills:LeadershipCommunicationCollaborationProblem-solving

Tech Stack:PAM4SerDesTXRXDFECTLEFIRPLLDLLBEREye diagrams

Company Brief

Intel

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor