PERC Rule Deck Development Engineer

Intel
Bengaluru
Workplace: OnsiteFull timeFunction: Product ManagementExperience: 10+ yearsSkills: ["Debugging","Problem-solving","Collaboration","Cross-functional teamwork","Automation"]

Develop and validate PERC (Programmable Electrical Rule Checker) rule decks to ensure electrical reliability compliance. Work with PDK teams and foundry to translate reliability requirements into programmable rules, build verification flows across Calibre PERC, Cadence Pegasus, and Synopsys tools, and debug PERC violations. Automate reliability check execution and reporting with scripting, and document guidelines to help designers implement correct-by-construction layouts.

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Intel
Intel
1 day ago

PERC Rule Deck Development Engineer

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Last checked: 20 hours agoStatus: Live

Job Summary

Develop and validate PERC (Programmable Electrical Rule Checker) rule decks to ensure electrical reliability compliance. Work with PDK teams and foundry to translate reliability requirements into programmable rules, build verification flows across Calibre PERC, Cadence Pegasus, and Synopsys tools, and debug PERC violations. Automate reliability check execution and reporting with scripting, and document guidelines to help designers implement correct-by-construction layouts.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Product Management
Seniority: Mid level

Key Responsibilities

  • •Develop, validate, and maintain PERC rule decks to identify electrical reliability violations.
  • •Build and optimize verification flows across multiple EDA environments while ensuring consistent results between Calibre PERC, Cadence Pegasus, and Synopsys tools.
  • •Collaborate with Device Physicists, Process Integration Engineers, and Analog Designers to translate reliability requirements into programmable rules.
  • •Debug and analyze PERC violations for design teams, separating true reliability risks from tool-induced false positives.
  • •Automate reliability check execution, reporting, and tracking across design versions using scripts, and maintain documentation/guidelines for correct-by-construction layouts.

Key Requirements

  • •Develop, validate, and maintain complex PERC rule decks for electrical reliability violations (e.g., ESD paths, current density, voltage stress, floating gates).
  • •Experience developing PERC rule decks (preferably using Calibre PERC) with knowledge of ESD, latch-up, and reliability verification.
  • •Familiarity with SVRF/TVF and scripting (Python, Tcl, or Perl/SKILL) and strong debugging/problem-solving skills.
  • •Knowledge of Linux and scripting (Python/Shell/Tcl) is desirable; experience with advanced technology nodes is an advantage.
  • •Able to collaborate as a team with global stakeholders and cross-functional groups (device/process/analog).
Experience:10+ yearsSemiconductor industry
Skills:DebuggingProblem-solvingCollaborationCross-functional teamworkAutomation
Tech Stack:PERCCalibre PERCCadence PegasusSynopsysSVRFTVFPythonSKILLTclPerlTcl scriptingLinuxShell

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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