ASIC Verification Engineer

Broadcom
Irvine, San Jose
Workplace: OnsiteFull timeUSD 101,000 - 162,000 annuallyFunction: Hardware, Embedded & Systems EngineeringExperience: 3+ yearsEducation: bachelorsSkills: ["Self-motivated","Good communication","Quick learning","Team player","Flexibility"]

Develop verification environments and testbench components for high-speed interconnect communication ASICs used in AI data centers and enterprise networks. Work with architecture, firmware, physical, and layout teams through the full product development cycle, from definition to production. Build thorough understanding of IEEE Ethernet protocols, participate in block and chip-level verification, and create automation scripts/tools to improve efficiency and quality using SystemVerilog UVM and related HDL and scripting languages.

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FursaFursa
Broadcom
Broadcom
1 month ago

ASIC Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 27 days agoStatus: Live

Job Summary

Develop verification environments and testbench components for high-speed interconnect communication ASICs used in AI data centers and enterprise networks. Work with architecture, firmware, physical, and layout teams through the full product development cycle, from definition to production. Build thorough understanding of IEEE Ethernet protocols, participate in block and chip-level verification, and create automation scripts/tools to improve efficiency and quality using SystemVerilog UVM and related HDL and scripting languages.
Location: Irvine, San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop thorough understanding of IEEE Ethernet protocols.
  • •Understand chip architecture, microarchitecture, and design specifications.
  • •Develop advanced verification environments and testbench components in SystemVerilog UVM.
  • •Participate in block-level and chip-level verification tasks.
  • •Create infrastructure scripts and tools to improve efficiency and quality.

Pay and Benefits

Salary: USD 101,000 - 162,000 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVision401kEquityPaid Leave

Key Requirements

  • •Bachelors in Engineering with 5+ years related experience, or Masters with 3+ years related experience, or PhD with no experience.
  • •Design/verification experience (or equivalent).
  • •Proficiency with HDL such as Verilog, SystemVerilog, or VHDL.
  • •Logic design and electronic circuit design background to support ASIC design and verification.
  • •Proficiency with C/C++ and familiarity with object-oriented programming; scripting skills (Python, Perl, TCL) are a plus.
Experience:3+ yearsSemiconductorsASIC verificationNetworkingCommunication ASICs
Education:Bachelor's
Skills:Self-motivatedGood communicationQuick learningTeam playerFlexibility
Tech Stack:SystemVerilogUVMVerilogVHDLCC++PythonPerlTCLObject Oriented ProgrammingIEEE Ethernet

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn