ASIC Design Engineer Intern (Video Silicon IP) - 2027 Summer

ByteDance
San Jose
Workplace: OnsiteInternshipFunction: Design (Product/UX/UI/Visual)Education: mastersSkills: ["Technical excellence","Collaboration","Problem-solving","Learning mindset"]

Join a fast-growing Video Silicon IP team building efficient, scalable video codec hardware solutions from the ground up. As an ASIC Design Engineer Intern, you’ll collaborate with architecture, algorithm, and verification experts to develop high-performance, low-power video processing IP. Apply your knowledge of computer architecture and ASIC design to create hardware for compressing and processing still images and videos, gaining real-world experience on large-scale video platforms.

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ByteDance
ByteDance
2 hours ago

ASIC Design Engineer Intern (Video Silicon IP) - 2027 Summer

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Last checked: 2 hours agoStatus: Live

Job Summary

Join a fast-growing Video Silicon IP team building efficient, scalable video codec hardware solutions from the ground up. As an ASIC Design Engineer Intern, you’ll collaborate with architecture, algorithm, and verification experts to develop high-performance, low-power video processing IP. Apply your knowledge of computer architecture and ASIC design to create hardware for compressing and processing still images and videos, gaining real-world experience on large-scale video platforms.
Location: San Jose
Workplace: Onsite
Employment Type: Internship
Job Function: Design (Product/UX/UI/Visual)
Seniority: Intern level

Key Responsibilities

  • •Work closely with architecture, algorithm, and verification teams to build high-performance, low-power video processing IPs.
  • •Apply computer architecture and ASIC design knowledge to create ASIC design for compressing and processing still images and videos.
  • •Develop hardware for advanced video encoding and processing in the Video Silicon IP team.
  • •Contribute to building video codec hardware solutions (FPGA and ASIC) from the ground up.
  • •Collaborate with a multidisciplinary team spanning algorithm, software, firmware, and hardware design/verification.

Key Requirements

  • •Currently pursuing a Master's in computer science, electrical engineering, or a related technical discipline.
  • •Knowledge of video codecs.
  • •Experience with RTL design (SystemVerilog) or High Level Synthesis (HLS).
  • •Experience with UVM methodology, SystemC, or DPI.
  • •Good programming skills in Python for task automation.
Experience:Video codecsASIC designRTL design
Education:Master's
Skills:Technical excellenceCollaborationProblem-solvingLearning mindset
Tech Stack:FPGAASICVideo codecRTLSystemVerilogHigh Level SynthesisHLSUVMSystemCDPIPython

Company Brief

ByteDance
Develops consumer internet and content platforms, including TikTok and other apps for short-form video, news, and entertainment. It also builds advertising, commerce, and creator tools that connect audiences, brands, and publishers across global markets.
Industry: Digital Media
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Established Company
Headquarters: Beijing, China
Founded: 2012
WebsiteLinkedIn