ASIC Physical Design Engineer — Synthesis and Timing – (Associate or Experienced)

Boeing
United States
Workplace: OnsiteFull timeUSD 98,600 - 162,150 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 1+ yearsEducation: bachelorsSkills: ["Analytical","Problem-solving","Communication","Autonomous"]

Own portions of the ASIC physical design flow for mission-critical satellite and space SoCs, spanning synthesis and static timing analysis through ECO implementation and tapeout readiness. Partner with RTL, verification, DFT, and backend teams to ensure clean netlist handoffs and reliable timing/power convergence. Build methodology and automation, evaluate tools, and troubleshoot complex cross-domain timing issues while supporting chip-level integration and signoff activities.

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FursaFursa
Boeing
Boeing
4 days ago

ASIC Physical Design Engineer — Synthesis and Timing – (Associate or Experienced)

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Last checked: 19 hours agoStatus: Live

Job Summary

Own portions of the ASIC physical design flow for mission-critical satellite and space SoCs, spanning synthesis and static timing analysis through ECO implementation and tapeout readiness. Partner with RTL, verification, DFT, and backend teams to ensure clean netlist handoffs and reliable timing/power convergence. Build methodology and automation, evaluate tools, and troubleshoot complex cross-domain timing issues while supporting chip-level integration and signoff activities.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Drive synthesis and static timing analysis, equivalence checking, floor-planning, timing constraints, timing/power convergence, and ECO implementation as part of the physical design flow.
  • •Partner with RTL, verification, DFT, and backend partner companies to ensure clean netlist handoffs and predictable convergence.
  • •Support chip-level integration, top-level timing closure, signoff readiness, and tapeout activities.
  • •Contribute to methodology, automation, tool evaluations, and flow documentation to improve the design process.
  • •Troubleshoot complex cross-domain timing issues and propose robust, repeatable fixes.

Pay and Benefits

Salary: USD 98,600 - 162,150 annually
Perks:Health InsuranceRetirement SavingsLife InsuranceDisability Insurance

Key Requirements

  • •Ability to obtain a U.S. Secret security clearance after start, which requires U.S. citizenship.
  • •Bachelor of Science degree in Engineering or Computer Science (or equivalent related qualifications).
  • •1+ years of practical experience in synthesis and static timing analysis (STA).
  • •Solid understanding of timing convergence, constraints generation/management, and logic synthesis at block or full-chip level.
  • •Experience with DFT, UPF/CPF power intent, ECO implementation, and signoff flows; proficiency with scripting (Tcl, Python, Perl).
Experience:1+ yearsAerospaceSpaceSemiconductorsASICSoC
Education:Bachelor's
Skills:AnalyticalProblem-solvingCommunicationAutonomous
Tech Stack:ASIC physical designSynthesisStatic timing analysis (STA)Equivalence checkingFloor-planningTiming constraintsTiming and power convergenceECO implementationNetlist handoffsDFTUPF/CPFSignoff flowsTclPythonPerl

Eligibility

Nationality:US National
Work Authorization:Authorization required. Sponsorship not provided.
Security Clearance:Secret

Company Brief

Boeing
Designs, manufactures, and services commercial airplanes, defense systems, space vehicles, and related products and services globally. Boeing serves airlines, governments, and commercial customers with aerospace and defense technologies and integrated support solutions.
Industry: Aerospace Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Arlington, United States
Founded: 1916
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