New Graduate Engineer, Silicon Engineering

SpaceX
Palo Alto, Irvine, Redmond
Workplace: OnsiteFull timeUSD 125,000 - 200,000 annuallyFunction: Hardware, Embedded & Systems EngineeringEducation: bachelorsSkills: ["Self-starter","Hands-on execution"]

Develop and verify next-generation silicon for Starlink, working across RF/analog IC, RTL design, verification, physical design, and DFT. Participate in full ASIC/FPGA design flows, lab bring-up and validation, and simulation/modeling for RFIC subsystems. Build DSP RTL using SystemVerilog, collaborate with system engineers, and execute synthesis through signoff for advanced technology-node tapeouts.

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FursaFursa
SpaceX
SpaceX
21 hours ago

New Graduate Engineer, Silicon Engineering

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 19 hours agoStatus: Live

Job Summary

Develop and verify next-generation silicon for Starlink, working across RF/analog IC, RTL design, verification, physical design, and DFT. Participate in full ASIC/FPGA design flows, lab bring-up and validation, and simulation/modeling for RFIC subsystems. Build DSP RTL using SystemVerilog, collaborate with system engineers, and execute synthesis through signoff for advanced technology-node tapeouts.
Location: Palo Alto, Irvine, Redmond
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Graduate level

Key Responsibilities

  • •Participate in ASIC/FPGA design and verification flows, including architecture contribution, RTL implementation, and emulation.
  • •Contribute to RF/analog IC work: simulate/model RFIC systems, derive subsystem specifications, and develop RF/microwave circuits in SiGe/CMOS processes.
  • •Develop and verify DSP RTL in SystemVerilog, working on DSP and digital communication blocks and validating against MATLAB models.
  • •Perform physical design steps (synthesis, floor planning, place and route, timing/noise analysis, and signoff checks) and develop automation for implementation steps.
  • •Bring up and validate ASICs and FPGAs in the lab, including embedded software development for C/C++ and/or Python-based workflows.

Pay and Benefits

Salary: USD 125,000 - 200,000 annually
Equity and Bonus:Equity
Perks:Health InsuranceVisionDental401kPaid ParentalLife InsurancePaid Leave

Key Requirements

  • •Graduating with a bachelor’s, master’s, or PhD in 2026 or 2027.
  • •Bachelor’s degree in an engineering discipline, mathematics, or physics.
  • •Experience working with ASIC, SoC, FPGA, RFIC, or MMIC.
  • •Ability to work extended hours and weekends as necessary to meet project milestones.
  • •Experience across ASIC/FPGA design or RF/analog IC, verification, bring-up, or post-silicon validation.
Education:Bachelor's in Engineering discipline, mathematics or physics
Skills:Self-starterHands-on execution
Languages:English
Tech Stack:ASICSoCFPGARFICMMICRTLSystemVerilogVerilogVHDLC/C++PythonMATLABFixed-point MATLAB modelADSSpectreHFSSMomentumSiGeCMOSEmulation

Eligibility

Nationality:US National

Company Brief

SpaceX
Designs, manufactures, and launches advanced rockets and spacecraft for commercial and government customers, aiming to reduce space transportation costs and enable human life on Mars through reusable launch vehicles and integrated space systems.
Industry: Aerospace Manufacturing
Company Size: Enterprise (1,001+ employees)
Growth: Established Company
Valuation: Hectocorn (USD 100B+)
Funding: Series E+
Headquarters: Hawthorne, United States
Founded: 2002
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