Principal ASIC Design Engineer

AMD
Markham
Workplace: HybridFull timeCAD 163,800 - 280,800 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Leadership","Mentoring","Cross-functional communication","Technical decision-making","Ownership"]

Provide technical leadership for IOHUB IP development, from architecture through tape-out and post-silicon validation. Partner with architecture and cross-functional teams (design, verification, firmware, physical design, and product) to translate requirements into scalable silicon solutions that meet functional, timing, area, power, security, scalability, and reliability goals. Lead design reviews, manage technical risks, drive best practices, and champion AI-assisted workflows to improve quality and execution.

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FursaFursa
AMD
AMD
1 day ago

Principal ASIC Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 10 hours agoStatus: Live

Job Summary

Provide technical leadership for IOHUB IP development, from architecture through tape-out and post-silicon validation. Partner with architecture and cross-functional teams (design, verification, firmware, physical design, and product) to translate requirements into scalable silicon solutions that meet functional, timing, area, power, security, scalability, and reliability goals. Lead design reviews, manage technical risks, drive best practices, and champion AI-assisted workflows to improve quality and execution.
Location: Markham
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Own critical IOHUB IP development execution from architecture through tape-out and post-silicon validation.
  • •Partner with architecture teams to evaluate trade-offs, define requirements, and translate product objectives into scalable design solutions.
  • •Drive design quality and implementation readiness across functional, timing, area, power, security, and reliability goals.
  • •Lead cross-functional collaboration among architecture, design, verification, firmware, physical design, and product teams to hit program milestones.
  • •Mentor engineers through reviews, debug, and technical decisions; drive post-silicon bring-up, validation, and root-cause analysis.

Pay and Benefits

Salary: CAD 163,800 - 280,800 annually

Key Requirements

  • •Provide technical leadership for ASIC/silicon design contributions through multiple successful product tape-outs.
  • •Deep expertise in RTL design, microarchitecture development, and complex IP design in advanced SoC environments.
  • •Experience delivering high-performance designs addressing power, performance, security, scalability, and virtualization requirements.
  • •Strong understanding of simulation, lint, CDC, RDC, formal verification, static analysis, synthesis, and timing closure methodologies.
  • •Proficiency with Verilog/SystemVerilog and scripting languages (Python, Perl, or Tcl) for design automation and productivity improvements.
Education:Bachelor's
Skills:LeadershipMentoringCross-functional communicationTechnical decision-makingOwnership
Tech Stack:ASIC designRTL designMicroarchitectureSoCVerilogSystemVerilogPythonPerlTclSimulationLintCDCRDCFormal verificationStatic analysisSynthesisTiming closureAI-enabled engineering toolsAutomationDesign automation

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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