Staff Layout Engineer – DPG Layout

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 6+ yearsEducation: mastersSkills: ["Technical leadership","Mentoring","Problem-solving","Communication","Continuous improvement"]

Own the physical development and layout implementation of critical analog, mixed-signal, and custom digital blocks, from block-level to full-chip partition layouts. Lead AI-assisted, rule-aware automation to accelerate placement, routing, optimization, and repetitive layout tasks. Drive layout verification closure (DRC/LVS and reliability/quality checks), predict and mitigate schedule and risk, and mentor engineers in analog layout and automation-first design-for-quality practices while collaborating with CAD, verification, and program teams.

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FursaFursa
Micron Technology
Micron Technology
4 months ago

Staff Layout Engineer – DPG Layout

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Source: Company careers pageValidated by: Fursa AI
Last checked: 14 hours agoStatus: Live

Job Summary

Own the physical development and layout implementation of critical analog, mixed-signal, and custom digital blocks, from block-level to full-chip partition layouts. Lead AI-assisted, rule-aware automation to accelerate placement, routing, optimization, and repetitive layout tasks. Drive layout verification closure (DRC/LVS and reliability/quality checks), predict and mitigate schedule and risk, and mentor engineers in analog layout and automation-first design-for-quality practices while collaborating with CAD, verification, and program teams.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Own physical implementation of critical analog, mixed-signal, and custom digital blocks, including block-level and full-chip/partition layout ownership.
  • •Lead AI-assisted and automated workflows to accelerate placement, routing, and optimization using copilot-based assistants and rule-aware automation.
  • •Perform and automate layout verification activities including DRC, LVS, Antenna, Yield, ESD, TOTEM, EM/IR, and quality checks to drive closure.
  • •Develop AI-enabled methodologies for semi-automated floorplanning, parasitic estimation, layout consistency checks, and best-practice enforcement; eliminate repetitive layout tasks using SKILL/Python/TCL or agent-based flows.
  • •Provide planning and technical leadership for area/cycle-time estimation, communicate risks and schedule impacts, and mentor engineers in analog layout fundamentals and design-for-quality/yield practices.

Key Requirements

  • •6+ years of experience in analog/custom layout design in advanced CMOS technology nodes.
  • •Hands-on expertise with Cadence Virtuoso (VLE/VXL) and Calibre DRC/LVS, including verification closure ownership.
  • •Proven experience laying out critical analog blocks such as PLLs, ADCs, DACs, LDOs, bandgaps, references, and charge pumps.
  • •Deep understanding of analog layout fundamentals including matching/symmetry, EM, latch-up, coupling/crosstalk, IR-drop, shielding, and guard-ring strategies.
  • •Experience defining, developing, and scaling AI-driven automation for complex layout workflows (e.g., floorplanning, estimation, consistency checks, and best-practice enforcement).
Experience:6+ yearsAnalog layoutCustom layoutAdvanced CMOSSemiconductorVLSI
Education:Master's in VLSI Design, Microelectronics, or Electronics Engineering
Skills:Technical leadershipMentoringProblem-solvingCommunicationContinuous improvement
Tech Stack:Cadence VirtuosoVLEVXLCalibreDRCLVSAntenn aESDTOTEMEM/IRSKILLPythonTCL

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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