Principal DFT Engineer (Silicon Engineering)

SpaceX
Austin, Irvine, Palo Alto
Workplace: OnsiteFull timeUSD 220,000 - 355,000 annuallyFunction: Communications, PR & CommunityExperience: 10+ yearsEducation: bachelorsSkills: ["Leadership","Problem-solving"]

Develop and optimize DFT architectures for next-generation ASICs used in space and ground Starlink infrastructure. Lead ATPG tools and methodologies, including pattern generation for fault models, hierarchical test flows, and post-silicon testing support. Validate scan insertion readiness using RTL and physical DRC tools, integrate and verify DFT fabrics/IP, and debug gate-level simulations while automating test scripts and analyzing results.

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FursaFursa
SpaceX
SpaceX
1 month ago

Principal DFT Engineer (Silicon Engineering)

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Last checked: 7 hours agoStatus: Live

Job Summary

Develop and optimize DFT architectures for next-generation ASICs used in space and ground Starlink infrastructure. Lead ATPG tools and methodologies, including pattern generation for fault models, hierarchical test flows, and post-silicon testing support. Validate scan insertion readiness using RTL and physical DRC tools, integrate and verify DFT fabrics/IP, and debug gate-level simulations while automating test scripts and analyzing results.
Location: Austin, Irvine, Palo Alto
Workplace: Onsite
Employment Type: Full time
Job Function: Communications, PR & Community
Seniority: Sr. Manager level

Key Responsibilities

  • •Lead implementation and optimization of DFT architectures, including scan insertion, compression/decompression logic, memory BIST, and logic BIST using Siemens Tessent tools.
  • •Own ATPG tools and methodologies for stuck-at, transition, and path delay fault models; focus on pattern compression, diagnosis, hierarchical test flows, and post-silicon validation support.
  • •Evaluate design readiness for scan insertion using RTL and physical design scan design rule check (DRC) tools.
  • •Integrate and verify DFT fabrics and IP within subsystems.
  • •Run and debug non-timing and SDF-annotated gate level simulations; develop test scripts, automate processes, and analyze data using Perl, Python, Tcl, or C++.

Pay and Benefits

Salary: USD 220,000 - 355,000 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVision401kLife InsurancePaid ParentalPaid LeavePaid HolidaysDisability Insurance

Key Requirements

  • •Bachelor’s degree in electrical engineering, computer engineering, or computer science.
  • •10+ years of experience working with ASICs.
  • •10+ years of experience in scan insertion and DFT setup, integration, and validation.
Experience:10+ years
Education:Bachelor's
Skills:LeadershipProblem-solving
Languages:English
Tech Stack:DFTASICSiemens TessentRTLATPGScan insertionMemory BISTLogic BISTScan design rule check (DRC)UPFFormal verificationDRCVerilogSystemVerilogUPF (Unified Power Format)SDF annotated gate level simulationsPerlPythonTclC++

Eligibility

Nationality:US National

Company Brief

SpaceX
Designs, manufactures, and launches advanced rockets and spacecraft for commercial and government customers, aiming to reduce space transportation costs and enable human life on Mars through reusable launch vehicles and integrated space systems.
Industry: Aerospace Manufacturing
Company Size: Enterprise (1,001+ employees)
Growth: Established Company
Valuation: Hectocorn (USD 100B+)
Funding: Series E+
Headquarters: Hawthorne, United States
Founded: 2002
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