Intern - HBM SoC RTL Design Engineer

Micron Technology
United States
Workplace: OnsiteInternshipUSD 38.84 - 50.24 hourlyFunction: Design (Product/UX/UI/Visual)Skills: ["Collaboration","Problem-solving","Attention to detail"]

Contribute to the Heterogeneous Integration Group by designing and implementing RTL for SoC-level blocks used in next-generation HBM SoC logic die. Work with architecture, verification, physical design, firmware, and product teams to integrate IP and translate specifications into high-quality RTL. Support SoC-level integration and participate in pre- and post-silicon validation, including root-cause analysis, documentation, and cross-functional design reviews.

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FursaFursa
Micron Technology
Micron Technology
1 week ago

Intern - HBM SoC RTL Design Engineer

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Last checked: 5 hours agoStatus: Live

Job Summary

Contribute to the Heterogeneous Integration Group by designing and implementing RTL for SoC-level blocks used in next-generation HBM SoC logic die. Work with architecture, verification, physical design, firmware, and product teams to integrate IP and translate specifications into high-quality RTL. Support SoC-level integration and participate in pre- and post-silicon validation, including root-cause analysis, documentation, and cross-functional design reviews.
Location: United States
Workplace: Onsite
Employment Type: Internship · 6 months
Job Function: Design (Product/UX/UI/Visual)
Seniority: Intern level

Key Responsibilities

  • •Design and implement RTL for SoC-level blocks and subsystems used in HBM logic die.
  • •Integrate internal and third-party IP such as controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, and PHY-adjacent logic.
  • •Collaborate with SoC architects to translate architectural and micro-architectural specifications into RTL implementations.
  • •Participate in SoC-level integration activities including clocking, reset, power intent, and configuration infrastructure.
  • •Assist with pre-silicon validation and post-silicon bring-up, including root-cause analysis of silicon issues.

Pay and Benefits

Salary: USD 38.84 - 50.24 hourly
Perks:Health InsuranceDentalVisionPaid Time-offPaid HolidaysParental Leave

Key Requirements

  • •Currently pursuing a Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field, and cannot graduate prior to December 2027.
  • •Must be available for a 6-month internship.
  • •Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies.
  • •Experience with the RTL-to-GDS flow, including synthesis and static timing analysis, and develop sign-off considerations.
  • •Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens, plus programming/scripting experience (Python, TCL, Perl, or shell scripting).
Experience:SemiconductorsHBMDRAMSoC designRTL-to-GDS
Education:
Skills:CollaborationProblem-solvingAttention to detail
Tech Stack:SystemVerilogVerilogRTL-to-GDSSynthesisStatic timing analysisCadenceSynopsysSiemensPythonTCLPerlShell scriptingEDA toolsClockingResetPower intentRoot-cause analysisAI-driven toolsAgentic AI

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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