STD Cell QA Engineer

Samsung
Bengaluru
Workplace: OnsiteFull timeFunction: QA, Test & Release EngineeringExperience: 4-13 yearsEducation: bachelorsSkills: []

Own QA for standard cell libraries, from test plan development through regression testing and post-layout verification. Use hands-on experience to develop environments and extract post-layout netlists, while applying strong CMOS knowledge (design rules, latch-up, electro-migration). Support digital circuit simulation and optimization for improved PPA, including statistical/variation analysis. Contribute to cutting-edge semiconductor technologies and drive energy-efficient power optimization and clock-cell design.

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FursaFursa
Samsung
Samsung
2 months ago

STD Cell QA Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 16 days agoStatus: Live

Job Summary

Own QA for standard cell libraries, from test plan development through regression testing and post-layout verification. Use hands-on experience to develop environments and extract post-layout netlists, while applying strong CMOS knowledge (design rules, latch-up, electro-migration). Support digital circuit simulation and optimization for improved PPA, including statistical/variation analysis. Contribute to cutting-edge semiconductor technologies and drive energy-efficient power optimization and clock-cell design.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: QA, Test & Release Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop test plans for standard cell libraries and execute regression testing.
  • •Perform post-layout verification and validate standard cell quality.
  • •Build QA environments and extract post-layout netlists.
  • •Apply CMOS knowledge (design rules, latch-up, electro migration) to support QA activities.
  • •Improve performance and efficiency of standard cell circuits using simulation, PPA optimization, and statistical/variation analysis.

Key Requirements

  • •4 to 13 years of experience with Standard Cell circuit design, including flip flops, latches, multibit flip flops, voltage level shifters, power optimization cells, and clock cells.
  • •Strong QA knowledge and hands-on experience for standard cell libraries, including test plan development, regression testing, and post-layout verification.
  • •Experience developing environments and extracting post-layout netlists.
  • •Good understanding of CMOS device characteristics, design rules, latch-up, and electro migration.
  • •Proficiency in digital circuit simulation, design/optimization for PPA, and statistical/variation analysis.
Experience:4-13 yearsSemiconductorsSemiconductor R&D
Education:Bachelor's
Tech Stack:CMOSDigital circuit simulationPost-layout netlistsTest plan developmentRegression testingPost-layout verification

Company Brief

Samsung
Global conglomerate known for consumer electronics, home appliances, semiconductors, displays, and mobile devices. Designs and manufactures a wide range of products and solutions for consumers, enterprises, and industrial customers worldwide.
Industry: Conglomerates & Holding Companies
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Seoul, South Korea
Founded: 1938
Glassdoor
Glassdoor: 3.7
WebsiteLinkedIn