Verification Engineer - ARM Fabric Unit Level

NVIDIA
Bengaluru, Hyderabad
Workplace: HybridFull timeFunction: QA, Test & Release EngineeringExperience: 2+ yearsEducation: bachelorsSkills: ["Debugging","Analytical skills","Communication","Teamwork"]

Own HSIO IP unit-level verification for ARM-based distributed fabric used in future automotive chips. Build UVM/SystemVerilog verification environments, including test plans, reusable bus functional models, monitors, checkers, scoreboards, and functional coverage. Drive verification closure for modules, clusters, and systems while partnering with architects, designers, FPGA, and post-silicon teams to ensure unit robustness. Experience with ARM protocols (AXI, AHB, APB) is required.

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FursaFursa
NVIDIA
NVIDIA
23 hours ago

Verification Engineer - ARM Fabric Unit Level

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Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live

Job Summary

Own HSIO IP unit-level verification for ARM-based distributed fabric used in future automotive chips. Build UVM/SystemVerilog verification environments, including test plans, reusable bus functional models, monitors, checkers, scoreboards, and functional coverage. Drive verification closure for modules, clusters, and systems while partnering with architects, designers, FPGA, and post-silicon teams to ensure unit robustness. Experience with ARM protocols (AXI, AHB, APB) is required.
Location: Bengaluru, Hyderabad
Workplace: Hybrid
Employment Type: Full time
Job Function: QA, Test & Release Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop UVM-based verification test benches and methodologies to verify ARM-based distributed fabric for transporting control, sidebands, and data.
  • •Architect the testbenches and craft the verification environment using SystemVerilog and UVM.
  • •Define test plans, tests, and verification infrastructure for modules, clusters, and systems.
  • •Build reusable bus functional models, monitors, checkers, and scoreboards; implement functional coverage and coordinate verification closure.
  • •Work with architects, designers, FPGA, and post-silicon teams to ensure the unit is robust.

Key Requirements

  • •BTech or MTech in ECE, EE, CSE, or an equivalent degree.
  • •2+ years of demonstrated ability in verification closure of complex units, sub-systems, or SOC level verification.
  • •Proven experience in ARM architecture and protocols (AXI, AHB and APB).
  • •Experience with the latest verification methodologies like SV and UVM.
  • •Strong debugging and analytical skills with exposure to industry-standard verification tools for simulation and debug.
Experience:2+ years
Education:Bachelor's in ECE, EE, CSE
Skills:DebuggingAnalytical skillsCommunicationTeamwork
Tech Stack:UVMSystemVerilog (SV)ARMAXIAHBAPBFPGAFunctional coverageSimulationDebuggingBus functional modelsMonitorsCheckersScoreboardsClaudeCursorFormal verification

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
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