Senior ASIC Verification Engineer - HSIO

NVIDIA
Austin
Full timeUSD 136,000 - 264,500 annuallyFunction: Hardware, Embedded & Systems EngineeringSkills: ["Debugging","Analytical skills","Problem solving","Communication","Collaboration","Autonomous","Creative"]

Verify the design and implementation of next-generation High Speed I/O controllers (e.g., Ethernet and NVLink) at IP/sub-system levels. You’ll build reusable bus functional models, monitors, checkers, and scoreboards using coverage-driven DV methodologies (UVM), define verification scope, and develop test plans, tests, and verification infrastructure. Collaborate with architects, designers, and pre/post-silicon teams to ensure correctness through debugging, analytics, functional coverage, and assertion-based verification.

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FursaFursa
NVIDIA
NVIDIA
3 days ago

Senior ASIC Verification Engineer - HSIO

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Last checked: 1 hour agoStatus: Live

Job Summary

Verify the design and implementation of next-generation High Speed I/O controllers (e.g., Ethernet and NVLink) at IP/sub-system levels. You’ll build reusable bus functional models, monitors, checkers, and scoreboards using coverage-driven DV methodologies (UVM), define verification scope, and develop test plans, tests, and verification infrastructure. Collaborate with architects, designers, and pre/post-silicon teams to ensure correctness through debugging, analytics, functional coverage, and assertion-based verification.
Location: Austin
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Own verification of ASIC design, architecture, golden models, and micro-architecture for High Speed I/O controllers at IP/sub-system levels using advanced DV methodologies such as UVM.
  • •Build reusable bus functional models, monitors, checkers, and scoreboards using coverage-driven verification methodology.
  • •Review design specifications and define verification scope; develop test plans, tests, and verification infrastructure to verify correctness.
  • •Collaborate with architects, designers, and pre/post silicon verification teams to accomplish verification tasks.
  • •Apply random stimulus, functional coverage, and assertion-based verification approaches to validate design behavior and resolve issues.

Pay and Benefits

Salary: USD 136,000 - 264,500 annually
Equity and Bonus:Equity

Key Requirements

  • •Bachelors or Masters Degree (or equivalent experience) with 5+ years of relevant experience.
  • •Experience verifying designs at unit/sub-system/SoC level with SystemVerilog and UVM.
  • •Expertise in comprehensive verification of IP or interconnect protocols (e.g., Ethernet, USB, SATA).
  • •Verification experience using random stimulus with functional coverage and assertion-based verification (UVM), plus exposure to industry-standard simulation tools.
  • •Strong debugging, analytical, and problem-solving skills with excellent communication and collaboration across teams.
Experience:ASIC verificationHigh Speed I/OSoCGPUAIInterconnect protocols
Skills:DebuggingAnalytical skillsProblem solvingCommunicationCollaborationAutonomousCreative
Tech Stack:SystemVerilogUVMUVM methodologyEthernetNVLinkUSBSATAPerlPythonUVM functional coverageAssertion-based verificationSimulation toolsGolden modelsScoreboardsCheckersMonitors

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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