Lead Product Engineer - UCIe & Functional Verification

Cadence Design Systems
Bengaluru, Noida, Ahmedabad
Workplace: OnsiteFull timeFunction: Administration & Executive AssistanceExperience: 5-8 yearsEducation: bachelorsSkills: ["Communication","Presentation","Problem-solving","Team collaboration"]

Lead Product Engineer in the UCIe and Functional Verification domain, responsible for accelerating VIP portfolio adoption with top-tier customers, translating customer requirements into technical specs, and transferring product knowledge across field teams. Supports pre-sales activities, collaborates with RnD, Marketing, and Support, and travels ~20% to engage with customers and ensure alignment across product dimensions.

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Cadence Design Systems
Cadence Design Systems
2 years ago

Lead Product Engineer - UCIe & Functional Verification

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Source: Company careers pageValidated by: Fursa AI
Last checked: 18 hours agoStatus: Live

Job Summary

Lead Product Engineer in the UCIe and Functional Verification domain, responsible for accelerating VIP portfolio adoption with top-tier customers, translating customer requirements into technical specs, and transferring product knowledge across field teams. Supports pre-sales activities, collaborates with RnD, Marketing, and Support, and travels ~20% to engage with customers and ensure alignment across product dimensions.
Location: Bengaluru, Noida, Ahmedabad
Workplace: Onsite
Employment Type: Full time
Job Function: Administration & Executive Assistance
Seniority: Sr. Manager level

Key Responsibilities

  • •Drive product knowledge transfer across field engineers and customers, providing training and developing collaterals.
  • •Translate high-level customer requirements into technical specs and drive product definition to fit customer needs.
  • •Support pre-sales technical activities to accelerate VIP portfolio adoption at top-tier customers.
  • •Collaborate with R&D, Marketing, and Support to ensure all product dimensions are aligned across functions and geographies.
  • •Travel approximately 20% to engage with customers and understand design and verification flows.
Travel: Medium travel

Key Requirements

  • •5 to 8 years of experience with Verification and Design.
  • •Working knowledge with UCIe domain and functional verification.
  • •Experience with Developing Verification environments using System Verilog.
  • •Working knowledge and experience with the UVM methodology.
  • •Excellent problem-solving and debugging skills.
Experience:5-8 yearsSemiconductorEDAHardware design
Education:Bachelor's
Skills:CommunicationPresentationProblem-solvingTeam collaboration
Tech Stack:SystemVerilogUVMUCIe

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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Glassdoor: 3.9
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