3 months ago

Physical Design Engineer II (Silicon Engineering)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Develop cutting-edge next-generation ASICs for Starlink, collaborating with cross-disciplinary teams to optimize RTL2GDSII physical design, timing, power and area targets. Perform partition synthesis, floorplanning, signoff checks, and drive architectural feasibility studies. This role involves hands-on design, verification and optimization in a fast-paced aerospace hardware environment with impact on satellites and terrestrial network.

Location: Irvine, Sunnyvale

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Perform partition synthesis and physical implementation steps (e.g. synthesis, floorplanning, power/ground grid generation, place and route, timing, noise, physical verification, electromigration, voltage drop, logic equivalency and other signoff checks)
•Develop/improve physical design methodologies and automation scripts for various implementation steps
•Closely collaborate with the ASIC design team to drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs
•Resolve design/timing/congestion and flow issues, identify potential solutions and drive execution
•Run, debug, and fix signoff closure issues in static timing analysis (STA), noise, logic equivalency, physical verification, electromigration and voltage drop

Key Requirements

•Bachelor’s degree in electrical engineering, computer engineering or computer science
•3+ years of professional experience working on RTL2GDSII physical design and/or physical design flow development
•Experience with industry standard EDA tools including understanding of their capabilities and underlying algorithms
•Knowledge of deep sub-micron FinFET and CMOS solid state physics
•Understanding of CMOS digital design principles, basic standard cells their functionality, standard cell libraries

Experience:3+ yearsSpaceSemiconductorASICEDAStarlink

Education:Bachelor's

Skills:PythonPerlShell scriptingTCLMakefileEDA tools

Languages:English

Tech Stack:PythonPerlShellTCLMakefileEDA tools

Company Brief

SpaceX

Designs, manufactures, and launches advanced rockets and spacecraft for commercial and government customers, aiming to reduce space transportation costs and enable human life on Mars through reusable launch vehicles and integrated space systems.

Industry: Aerospace Manufacturing

Company Size: Enterprise (1,001+ employees)

Growth: Established Company

Valuation: Hectocorn (USD 100B+)

Funding: Series E+

Headquarters: Hawthorne, United States

Founded: 2002

Glassdoor: 4.2

Website LinkedIn

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SpaceX

3 months ago

Physical Design Engineer II (Silicon Engineering)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 2 hours agoStatus: Live

Job Summary

Location: Irvine, Sunnyvale

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Perform partition synthesis and physical implementation steps (e.g. synthesis, floorplanning, power/ground grid generation, place and route, timing, noise, physical verification, electromigration, voltage drop, logic equivalency and other signoff checks)
•Develop/improve physical design methodologies and automation scripts for various implementation steps
•Closely collaborate with the ASIC design team to drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs
•Resolve design/timing/congestion and flow issues, identify potential solutions and drive execution
•Run, debug, and fix signoff closure issues in static timing analysis (STA), noise, logic equivalency, physical verification, electromigration and voltage drop

Key Requirements

•Bachelor’s degree in electrical engineering, computer engineering or computer science
•3+ years of professional experience working on RTL2GDSII physical design and/or physical design flow development
•Experience with industry standard EDA tools including understanding of their capabilities and underlying algorithms
•Knowledge of deep sub-micron FinFET and CMOS solid state physics
•Understanding of CMOS digital design principles, basic standard cells their functionality, standard cell libraries

Experience:3+ yearsSpaceSemiconductorASICEDAStarlink

Education:Bachelor's

Skills:PythonPerlShell scriptingTCLMakefileEDA tools

Languages:English

Tech Stack:PythonPerlShellTCLMakefileEDA tools

Company Brief

SpaceX

Industry: Aerospace Manufacturing

Company Size: Enterprise (1,001+ employees)

Growth: Established Company

Valuation: Hectocorn (USD 100B+)

Funding: Series E+

Headquarters: Hawthorne, United States

Founded: 2002

Glassdoor: 4.2

Website LinkedIn