1 month ago

Software Engineer - Core Systems

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Source: Company careers pageValidated by: Fursa AI

Last checked: 17 hours agoStatus: Live

Job Summary

Own and evolve real-time C++ infrastructure powering a humanoid robot’s “brain and nervous system,” including sensor pipelines, motor control interfaces, deterministic scheduling, and the IPC/serialization layers between perception, planning, and actuation. Establish performance standards via benchmarking, flamegraph tooling, profiling, and regression tracking to prevent latency/throughput drift. Ship foundational libraries used reliably across thousands of robots in homes and warehouses.

Location: United States

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Seniority: Mid level

Key Responsibilities

•Own and continuously improve real-time C++ infrastructure, including sensor pipelines, motor control interfaces, and deterministic scheduling for dependents.
•Establish performance standards with benchmarking, flamegraph tooling, and regression tracking to catch latency/throughput drift before production.
•Build IPC and serialization layers connecting perception, planning, and actuation using lock-free queues, memory pools, and shared-memory buffers.
•Ensure foundational libraries run reliably at scale across thousands of robots in homes and warehouses, not just prototypes.

Pay and Benefits

Salary: USD 200,000 - 280,000 annually

Equity and Bonus:Equity

Perks:Health InsuranceDentalVisionPaid LeaveParental Leave401kLife Insurance

Key Requirements

•5+ years shipping production C++ in performance-critical systems (robotics, autonomous vehicles, HFT, game engines, OS/runtime, compilers, or HPC).
•Ability to profile, benchmark, and debug at the systems level using flamegraphs, perf counters, assembly inspection, and Linux kernel interfaces.
•Proven track record writing systems code that other engineers can build on via clean interfaces, minimal dependencies, and deterministic behavior under load.
•Experience with real-time or safety-critical systems where latency guarantees and failure modes have physical consequences.
•Experience with lock-free data structures, memory pools, and shared-memory IPC patterns.

Experience:5+ yearsRoboticsAutonomous vehiclesHFTGame enginesOS/runtimeCompilersHPC

Skills:OwnershipReliabilityInterface-first thinkingDebuggingPerformance focus

Tech Stack:C++LinuxIPCInter-process communicationSensor pipelinesMotor controlLock-free queuesMemory poolsShared-memoryBenchmarkingFlamegraphPerf countersAssembly inspectionCross-compilationEmbedded Linux

Company Brief

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