Physical IC Design Engineer
Broadcom
San Jose
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Communication","Technical direction"]Own chip-level physical verification and issue resolution for advanced-node ASICs in a performance-focused environment. Set up runsets and tool flows, manage top-level floorplan/I/O/bump planning rules, and resolve integration and assembly physical design issues. Provide technical direction for verification methodologies (DRC/LVS/ERC/PERC) and develop best-practice guidelines to optimize physical verification runtimes and flow quality for tape-outs and respins.

