STAFF Engineer -DEG Layout

Micron Technology
Bengaluru
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 12-18 yearsSkills: ["Communication","Problem-solving","Leadership","Planning","Scheduling"]

Own layout design and development for critical analog, mixed-signal, and custom digital blocks through full-chip level. Execute physical verification (LVS, DRC, antenna, matching, EM/IR and latch-up checks), automate layout tasks, and deliver high-quality block layouts on schedule. Lead planning, area/time estimation, delegation, and coordination with global engineering teams, including guiding and reviewing team members’ sub-block layout work.

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FursaFursa
Micron Technology
Micron Technology
2 months ago

STAFF Engineer -DEG Layout

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Last checked: 18 hours agoStatus: Live

Job Summary

Own layout design and development for critical analog, mixed-signal, and custom digital blocks through full-chip level. Execute physical verification (LVS, DRC, antenna, matching, EM/IR and latch-up checks), automate layout tasks, and deliver high-quality block layouts on schedule. Lead planning, area/time estimation, delegation, and coordination with global engineering teams, including guiding and reviewing team members’ sub-block layout work.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Drive layout design and development for critical analog, mixed-signal, custom digital blocks, standard cells, and full-chip level.
  • •Perform layout verification including LVS, DRC, antenna, shield, matching, latch-up, EM/IR tot em checks, quality checks, and documentation.
  • •Develop digital block layouts using auto placement and route tools, ensuring high-quality outputs.
  • •Lead planning, area/time estimation, scheduling, delegation, and execution to meet project schedules in a multi-project environment.
  • •Guide team members on sub-block layout execution and review their work; coordinate with global engineering teams to ensure layout project success.

Key Requirements

  • •12–18 years of analog/custom layout design experience in advanced CMOS processes.
  • •Expertise with Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS.
  • •Hands-on experience creating layouts for critical blocks (e.g., temperature sensor, PLL, ADC/DAC, LDO, bandgap, reference generators, charge pump, current mirrors, comparator, differential amplifier).
  • •Strong analog layout fundamentals (matching, electro-migration, latch-up, coupling/crosstalk, IR-drop, active/passive parasitics) and ability to implement design constraints.
  • •Ability to automate layout execution tasks using AI and communicate effectively in verbal and written form.
Experience:12-18 yearsAnalog layoutCustom digital blocksMixed-signalDRAMNANDCMOS
Skills:CommunicationProblem-solvingLeadershipPlanningScheduling
Tech Stack:Cadence VLECadence VXLMentor Graphics CalibreLVSDRCAntennaShieldMatchingLatch-upEM IRAuto placementRoutingAI toolsPythonAutomation

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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