Principal AE, Serdes Design IP

Cadence Design Systems
San Jose
Workplace: OnsiteFull timeUSD 127,400 - 236,600 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 15+ yearsEducation: bachelorsSkills: ["Leadership","Initiative","Collaboration","Presentation","Communication"]

Architect and deliver customer-facing interface solutions using Cadence Serdes IP across high-speed standards like PCIe, CXL, Ethernet, and USB. Lead technical presales and configuration, serve as a product expert in PHY/controller IPs and protocols, and demonstrate performance at events. Partner with IP Sales, marketing, and R&D to win opportunities, provide quick-turn technical support, and create application notes and articles. Travel to customer sites may be required occasionally.

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Cadence Design Systems
Cadence Design Systems
2 days ago

Principal AE, Serdes Design IP

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Last checked: 35 minutes agoStatus: Live

Job Summary

Architect and deliver customer-facing interface solutions using Cadence Serdes IP across high-speed standards like PCIe, CXL, Ethernet, and USB. Lead technical presales and configuration, serve as a product expert in PHY/controller IPs and protocols, and demonstrate performance at events. Partner with IP Sales, marketing, and R&D to win opportunities, provide quick-turn technical support, and create application notes and articles. Travel to customer sites may be required occasionally.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Architect interface solutions for customers using Cadence Serdes IP and showcase IP performance.
  • •Lead technical presales and configuration of high-speed interface IP, including PCIe, CXL, and Ethernet PHY and controllers.
  • •Present Cadence’s IP portfolio and capabilities to prospective customers.
  • •Work with IP Sales, marketing, and R&D teams to win opportunities.
  • •Provide quick-turn product-specific technical support and create application notes and articles; travel to customer sites may be required occasionally.
Travel: Low travel

Pay and Benefits

Salary: USD 127,400 - 236,600 annually
Perks:Paid LeavePaid Holidays401kHealth InsuranceDentalVision

Key Requirements

  • •BS in EE, CE, or related with 15+ years of relevant experience, or MS in EE, CE, or equivalent with 10+ years.
  • •Solid experience with one or more high-speed interface protocols such as PCIe, CXL, UCIe, Ethernet, USB, MIPI, 224G, or 112G.
  • •Strong knowledge of PHY and/or controllers for one or more high-speed interface protocols.
  • •Ability to lead initiatives and manage pre-sales accounts as an individual leader.
  • •Excellent presentation skills and verbal/written communication skills.
Experience:15+ yearsSemiconductorIPHardwareInterface protocols
Education:Bachelor's
Skills:LeadershipInitiativeCollaborationPresentationCommunication
Tech Stack:PCIeCXLUCIeEthernetUSBMIPI224G112GPHYController IPAXIPIPESerdes IPDigital controllers

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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Glassdoor: 3.9
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