Intel

2 days ago

Principal SerDes Architect

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 22 hours agoStatus: Live

Job Summary

Drive the architecture and development of next-generation high-speed IO PHYs for analog and mixed-signal IPs at advanced process nodes. Design and optimize TX/RX analog circuits, create floorplans, extract chip parameters, and simulate behavior models to hit power, performance, area, and yield goals. Own test plans, verify against microarchitecture specs, and partner with architecture and layout teams while providing technical leadership and mentoring across Intel.

Location: Santa Clara, Phoenix

Workplace: Hybrid

Employment Type: Full time

Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

•Lead architecture definition and development of next-generation high-speed IO PHYs with industry-leading PPA metrics.
•Design, develop, and optimize analog circuits (TX/RX) in advanced process nodes for analog and mixed-signal IPs.
•Create floorplans, extract chip parameters, and simulate analog behavior models to meet performance, power, and area goals.
•Develop comprehensive test plans and verify designs against microarchitecture specifications, evaluating results for functionality.
•Optimize circuit performance, power, area, and yield; collaborate with architecture and layout teams and provide technical leadership and mentoring.

Pay and Benefits

Salary: USD 220,920 - 311,890 annually

Equity and Bonus:Equity

Perks:Health InsuranceRetirementPaid LeaveEquity

Key Requirements

•BS/Bachelor's in Electrical Engineering, Computer Engineering, or related field with 12+ years of analog circuit design experience (or MS with 10+ years).
•Deep expertise in analog circuit design fundamentals, including TX/RX blocks, I/O PHY architecture, low-power design, and signal/power integrity.
•Proficiency in analog behavior modeling, circuit simulation, and optimization for power, performance, area, and yield.
•Experience in advanced process nodes and solving analog/mixed-signal design challenges.
•Technical leadership track record influencing direction across organizations or the industry.

Experience:Analog circuit designAdvanced process nodesAnalog and mixed-signal designSerDesHigh-speed IO

Education:Bachelor's in Electrical Engineering, Computer Engineering, or a related field

Skills:Technical leadershipProblem-solvingStrategic thinkingMentoringCollaboration

Tech Stack:Analog circuit designTX/RX blocksI/O PHY architectureLow-power designSignal integrityPower integrityAnalog behavior modelingCircuit simulationPPA metricsFloorplansTest plansMicroarchitecture specificationsSerDes fundamentalsUCIePCIeAnalog architectureLayout optimizationPowerPerformanceArea

Company Brief

Intel

Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor

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Intel

2 days ago

Principal SerDes Architect

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 22 hours agoStatus: Live

Job Summary

Location: Santa Clara, Phoenix

Workplace: Hybrid

Employment Type: Full time

Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

•Lead architecture definition and development of next-generation high-speed IO PHYs with industry-leading PPA metrics.
•Design, develop, and optimize analog circuits (TX/RX) in advanced process nodes for analog and mixed-signal IPs.
•Create floorplans, extract chip parameters, and simulate analog behavior models to meet performance, power, and area goals.
•Develop comprehensive test plans and verify designs against microarchitecture specifications, evaluating results for functionality.
•Optimize circuit performance, power, area, and yield; collaborate with architecture and layout teams and provide technical leadership and mentoring.

Pay and Benefits

Salary: USD 220,920 - 311,890 annually

Equity and Bonus:Equity

Perks:Health InsuranceRetirementPaid LeaveEquity

Key Requirements

•BS/Bachelor's in Electrical Engineering, Computer Engineering, or related field with 12+ years of analog circuit design experience (or MS with 10+ years).
•Deep expertise in analog circuit design fundamentals, including TX/RX blocks, I/O PHY architecture, low-power design, and signal/power integrity.
•Proficiency in analog behavior modeling, circuit simulation, and optimization for power, performance, area, and yield.
•Experience in advanced process nodes and solving analog/mixed-signal design challenges.
•Technical leadership track record influencing direction across organizations or the industry.

Experience:Analog circuit designAdvanced process nodesAnalog and mixed-signal designSerDesHigh-speed IO

Education:Bachelor's in Electrical Engineering, Computer Engineering, or a related field

Skills:Technical leadershipProblem-solvingStrategic thinkingMentoringCollaboration

Company Brief

Intel

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor