Lead Product Engineer

Cadence Design Systems
Bengaluru
Workplace: OnsiteFull timeFunction: Administration & Executive AssistanceExperience: 4-7 yearsEducation: bachelorsSkills: ["Analytical thinking","Problem-solving","Teamwork","Cross-geographic coordination","Debugging mindset"]

Lead product engineering for synthesis flows, focusing on LEC and CLP engagements. As an individual contributor, debug and resolve issues across synthesis, LEC, and CLP, coordinating with cross-geographic teams. Bring strong HDL knowledge (Verilog, SystemVerilog, and/or VHDL), RTL design and synthesis expertise, and low-power concepts including leakage and dynamic power optimization. Apply automation and scripting (Perl or Tcl) and use EDA tools for design problem debugging.

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FursaFursa
Cadence Design Systems
Cadence Design Systems
2 days ago

Lead Product Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 9 hours agoStatus: Live
Reposted: similar role first listed 9 months ago

Job Summary

Lead product engineering for synthesis flows, focusing on LEC and CLP engagements. As an individual contributor, debug and resolve issues across synthesis, LEC, and CLP, coordinating with cross-geographic teams. Bring strong HDL knowledge (Verilog, SystemVerilog, and/or VHDL), RTL design and synthesis expertise, and low-power concepts including leakage and dynamic power optimization. Apply automation and scripting (Perl or Tcl) and use EDA tools for design problem debugging.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Administration & Executive Assistance
Seniority: Mid level

Key Responsibilities

  • •Own product engineering for synthesis flows, including LEC and CLP.
  • •Investigate and resolve issues related to synthesis, LEC, and CLP engagements.
  • •Work as an individual contributor while coordinating effectively with cross-geographic teams.
  • •Apply RTL design and synthesis concepts to support debugging and problem resolution.
  • •Use EDA tools to debug design problems and leverage automation via Perl or Tcl when needed.

Key Requirements

  • •B.E/B.Tech/M.Tech in Electrical, Electronics, or Computer Science Engineering from a reputed institute with strong academic credentials.
  • •Good understanding of HDLs (Verilog, SystemVerilog and/or VHDL).
  • •Proficiency in RTL design and synthesis concepts.
  • •Understanding of low-power concepts, including leakage and dynamic power optimization.
  • •Experience with synthesis/LEC/CLP and process automation using Perl or Tcl scripting; working knowledge of EDA tools for debugging.
Experience:4-7 years
Education:Bachelor's in Electrical, Electronics or Computer Science Engineering
Skills:Analytical thinkingProblem-solvingTeamworkCross-geographic coordinationDebugging mindset
Tech Stack:HDLsVerilogSystemVerilogVHDLRTL designSynthesisLECCLPPnRLow-power conceptsLeakageDynamic power optimizationPerlTclEDA toolsCadence

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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