Cadence Design Systems

1 month ago

Software Engineer II : AI Compiler Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 5 hours agoStatus: Live

Job Summary

Develop and optimize a deep learning compiler stack for CNNs/RNNs on embedded processors. Implement and integrate neural network operations using LLVM/MLIR, benchmark across DSPs, collaborate with hardware designers, and help standardize neural network APIs for edge AI applications in Cadence's Xtensa-based platforms.

Location: Belo Horizonte

Workplace: Hybrid

Employment Type: Full time · Permanent

Job Function: Software Engineering

Seniority: Mid level

Key Responsibilities

•Developing a deep learning compiler stack that takes neural network descriptions (CNNs/RNNs) created in frameworks such as Caffe, PyTorch, TensorFlow, etc. and converts them into code suitable for execution on special-purpose and embedded platforms.
•Use modern compiler frameworks such as LLVM and MLIR.
•Developing optimized implementations of a variety of neural-network operations and integrating them into a runtime framework
•Developing new optimization techniques and algorithms to efficiently map CNNs onto a wide range of Xtensa processors and specialized hardware.
•Benchmarking end-to-end network performance on a variety of DSP and special-purpose accelerator platforms.

Pay and Benefits

Perks:Hybrid Work

Key Requirements

•Complete Bachelor in Computer Science or Computer Engineering or equivalent experience.
•3-5+ years of C and C++ programming experience on Linux and Windows, including test, debug and release.
•Knowledge of and experience with a state-of-the-art compiler stack such as LLVM and MLIR.
•Experience implementing compilation techniques such as loop optimization, polyhedral models, and IR construction/transition/lowering techniques.
•Nice to have: Master or PhD; Python experience; experience with CNNs and deep learning frameworks (TensorFlow, Caffe/2, etc.) and embedded DSP optimization.

Experience:3-5 yearsEmbeddedEdge AISemiconductorsXtensaNeural networks

Education:Bachelor's

Skills:CC++LinuxWindowsLLVMMLIRPyTorchTensorFlowCNNsDSP

Tech Stack:CC++LinuxWindowsLLVMMLIRPyTorchTensorFlowCNNsXtensaDSP

Company Brief

Cadence Design Systems

Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor

Loading job details...

Preparing the role view and application actions.

Cadence Design Systems

1 month ago

Software Engineer II : AI Compiler Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 5 hours agoStatus: Live

Job Summary

Location: Belo Horizonte

Workplace: Hybrid

Employment Type: Full time · Permanent

Job Function: Software Engineering

Seniority: Mid level

Key Responsibilities

•Developing a deep learning compiler stack that takes neural network descriptions (CNNs/RNNs) created in frameworks such as Caffe, PyTorch, TensorFlow, etc. and converts them into code suitable for execution on special-purpose and embedded platforms.
•Use modern compiler frameworks such as LLVM and MLIR.
•Developing optimized implementations of a variety of neural-network operations and integrating them into a runtime framework
•Developing new optimization techniques and algorithms to efficiently map CNNs onto a wide range of Xtensa processors and specialized hardware.
•Benchmarking end-to-end network performance on a variety of DSP and special-purpose accelerator platforms.

Pay and Benefits

Perks:Hybrid Work

Key Requirements

•Complete Bachelor in Computer Science or Computer Engineering or equivalent experience.
•3-5+ years of C and C++ programming experience on Linux and Windows, including test, debug and release.
•Knowledge of and experience with a state-of-the-art compiler stack such as LLVM and MLIR.
•Experience implementing compilation techniques such as loop optimization, polyhedral models, and IR construction/transition/lowering techniques.
•Nice to have: Master or PhD; Python experience; experience with CNNs and deep learning frameworks (TensorFlow, Caffe/2, etc.) and embedded DSP optimization.

Experience:3-5 yearsEmbeddedEdge AISemiconductorsXtensaNeural networks

Education:Bachelor's

Skills:CC++LinuxWindowsLLVMMLIRPyTorchTensorFlowCNNsDSP

Tech Stack:CC++LinuxWindowsLLVMMLIRPyTorchTensorFlowCNNsXtensaDSP

Company Brief

Cadence Design Systems

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor