Cisco

2 weeks ago

ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 1 hour agoStatus: Live

Job Summary

Design and develop high-speed analog/mixed-signal ASICs for Cisco’s silicon photonics driver integrated circuits used in 100G/200G/400G per-lambda optical transceivers. Own full-chip electrical specifications, datapath/control circuit design, and verification test plans from concept to production. Optimize for power, performance, testability, and cost; debug bring-up and lab validation issues to improve yield, while collaborating across electrical, optical, digital (SI/PI), and product teams.

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Participate in analog/mixed-signal design for next-generation silicon photonics driver ICs for 100G/200G/400G per-lambda solutions.
•Drive full-chip electrical specifications, circuit design, and verification test plans from concept through production while coordinating across electrical, optical, and product teams.
•Author mixed-signal datapath designs including modulator drivers, serializers, PLLs, TIAs, and control circuits; optimize power, performance, testability, and cost.
•Debug complex silicon and system-level issues during bring-up and lab validation; drive yield enhancements and failure analysis.
•Collaborate with architecture, digital, SI/PI, and product teams on verification, design, and testability strategies.

Key Requirements

•Bachelors and 10+ years related experience, or Masters and 6+ years, or PhD and 3+ years high-speed AMS design experience.
•Demonstrated expertise in high-speed optical transceiver design (modulator drivers, TIA, CDR, PLLs, ADC/DAC) and proficiency with Cadence Virtuoso, Spectre, and Caliber.
•Strong skills in device physics and circuit operations.
•Proficiency in Python or C for design automation, scripting, and analytical tools.

Experience:10+ years

Education:Bachelor's

Skills:CollaborationTeamwork

Tech Stack:Cadence VirtuosoSpectreCaliberPythonCVerilog-ASI/PIBERTsDigital communication analyzersReal-time scopesTest fixturePCBVerilog-A modeling

Company Brief

Cisco

Global technology company that designs, manufactures, and sells networking hardware, telecommunications equipment, and high-technology services and products for enterprises, service providers, and governments worldwide.

Industry: Networking Equipment

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1984

Glassdoor: 4.0

Website LinkedIn Glassdoor

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Cisco

2 weeks ago

ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 1 hour agoStatus: Live

Job Summary

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Participate in analog/mixed-signal design for next-generation silicon photonics driver ICs for 100G/200G/400G per-lambda solutions.
•Drive full-chip electrical specifications, circuit design, and verification test plans from concept through production while coordinating across electrical, optical, and product teams.
•Author mixed-signal datapath designs including modulator drivers, serializers, PLLs, TIAs, and control circuits; optimize power, performance, testability, and cost.
•Debug complex silicon and system-level issues during bring-up and lab validation; drive yield enhancements and failure analysis.
•Collaborate with architecture, digital, SI/PI, and product teams on verification, design, and testability strategies.

Key Requirements

•Bachelors and 10+ years related experience, or Masters and 6+ years, or PhD and 3+ years high-speed AMS design experience.
•Demonstrated expertise in high-speed optical transceiver design (modulator drivers, TIA, CDR, PLLs, ADC/DAC) and proficiency with Cadence Virtuoso, Spectre, and Caliber.
•Strong skills in device physics and circuit operations.
•Proficiency in Python or C for design automation, scripting, and analytical tools.

Experience:10+ years

Education:Bachelor's

Skills:CollaborationTeamwork

Tech Stack:Cadence VirtuosoSpectreCaliberPythonCVerilog-ASI/PIBERTsDigital communication analyzersReal-time scopesTest fixturePCBVerilog-A modeling

Company Brief

Cisco

Industry: Networking Equipment

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1984

Glassdoor: 4.0

Website LinkedIn Glassdoor